ADF4116 Analog Devices, ADF4116 Datasheet - Page 3

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ADF4116

Manufacturer Part Number
ADF4116
Description
Single, Integer-n 550 MHZ PLL
Manufacturer
Analog Devices
Datasheet

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Parameter
NOISE CHARACTERISTICS
NOTES
10
11
12
13
14
15
Specifications subject to change without notice.
TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
NOTES
1
Specifications subject to change without notice.
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
Guaranteed by design but not production tested.
Operating temperature range is as follows: B Version: –40°C to +85°C.
The B Chip specifications are given as typical values.
This is the maximum operating frequency of the CMOS counters.
AV
Guaranteed by design. Sample tested to ensure compliance.
AV
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value).
The phase noise is measured with the EVAL-ADF411xEB Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for
the synthesizer (f
f
f
f
f
f
f
Same conditions as above.
REFIN
REFIN
REFIN
REFIN
REFIN
REFIN
ADF4118 Phase Noise Floor
Phase Noise Performance
Spurious Signals
DD
DD
ADF4116
ADF4117
ADF4118
ADF4117
ADF4118
ADF4118
ADF4118
ADF4116
ADF4117
ADF4118
ADF4117
ADF4118
ADF4118
ADF4118
= 10 MHz; f
= DV
= DV
= 10 MHz; f
= 10 MHz; f
= 10 MHz; f
= 10 MHz; f
= 10 MHz; f
DD
DD
= 3 V; for AV
= 3 V; RF
9
10
10
11
12
13
14
9
10
10
11
12
13
14
REFOUT
PFD
PFD
PFD
PFD
PFD
PFD
540 MHz Output
900 MHz Output
900 MHz Output
836 MHz Output
1750 MHz Output
1750 MHz Output
1960 MHz Output
540 MHz Output
900 MHz Output
900 MHz Output
836 MHz Output
1750 MHz Output
1750 MHz Output
1960 MHz Output
= 200 kHz; Offset frequency = 1 kHz; f
= 200 kHz; Offset frequency = 1 kHz; f
= 30 kHz; Offset frequency = 300 Hz; f
= 200 kHz; Offset frequency = 1 kHz; f
= 10 kHz; Offset frequency = 200 Hz; f
= 200 kHz; Offset frequency = 1 kHz; f
= 10 MHz @ 0 dBm).
IN
for ADF4116 = 540 MHz; RF
DD
= DV
8
Limit at T
(B Version)
10
10
25
25
10
20
7
DD
= 5 V, use CMOS-compatible levels.
–88/–90
–80/–86
B Version
–170
–162
–89
–87
–90
–78
–85
–65
–84
–88/–99
–90/–104
–91/–100
–80/–84
–65/–73
1
MIN
(AV
T
A
= T
DD
to T
IN
= DV
MIN
for ADF4117, ADF4118 = 900 MHz.
MAX
RF
RF
RF
RF
RF
RF
to T
DD
= 540 MHz; N = 2700; Loop B/W = 20 kHz.
= 900 MHz; N = 4500; Loop B/W = 20 kHz.
= 1750 MHz; N = 8750; Loop B/W = 20 kHz.
= 1960 MHz; N = 9800; Loop B/W = 20 kHz.
= 836 MHz; N = 27867; Loop B/W = 3 kHz.
= 1750 MHz; N = 175000; Loop B/W = 1 kHz.
B Chips
–170
–162
–89
–87
–90
–78
–85
–65
–84
–88/–99
–90/–104
–91/–100
–80/–84
–88/–90
–65/–73
–80/–86
MAX
= 3 V
unless otherwise noted.)
2
10%, 5 V
Unit
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
Unit
ns min
ns min
ns min
ns min
ns min
ns min
10%; AV
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
Note 15
Note 15
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
Test Conditions/Comments
@ VCO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
Note 15
Note 15
@ 300 Hz Offset and 30 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 200 Hz Offset and 10 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 30 kHz/60 kHz and 30 kHz PFD Frequency
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
DD
≤ V
P
ADF4116/ADF4117/ADF4118
< 6.0 V; AGND = DGND = CPGND = 0 V;
Test Conditions/Comments
DATA to CLOCK Setup Time
DATA to CLOCK Hold Time
CLOCK High Duration
CLOCK Low Duration
CLOCK to LE Setup Time
LE Pulsewidth

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