lxt9763 Intel Corporation, lxt9763 Datasheet - Page 14

• Manufacturer Part Number: lxt9763
• Description: Fast Ethernet 10/100 Hex Transceiver With Full Mii
• Manufacturer: Intel Corporation

LXT9763 — Fast Ethernet 10/100 Hex Transceiver with Full MII
14
107, 114, 123, 138, 147, 154
106, 115, 122, 139, 146, 155
80, 89, 179
15, 31, 52, 67, 193, 208
1, 16, 32, 53, 68, 81, 87, 88, 178,
192
103, 110, 111, 118, 119, 126, 135,
142, 143, 150, 151, 158
78
1. Type Column Coding: I = Input, O = Output, A = Analog.
2. The LXT9763 supports the 802.3 MDIO register set. Specific bits in the registers are referenced using an “X.Y” notation,
1. Type Column Coding: I = Input, O = Output, A = Analog, IP = weak internal pull-up, ID = weak internal pull-down.
Pin#
163
164
165
166
167
where X is the register number (0-32) and Y is the bit number (0-15).
Table 3.
Table 4.
Table 5.
127-134
Pin#
101
100
102
99
98
97
92
TDI
TDO
TMS
TCK
TRST
Symbol
Pin#
LXT9763 Miscellaneous Signal Descriptions (Continued)
LXT9763 Power Supply Signal Descriptions
LXT9763 JTAG Test Signal Descriptions
ADD_4
ADD_3
ADD_2
ADD_1
ADD_0
RBIAS
REFCLK
N/C
Symbol
Type
I / IP
I / IP
I / ID
I / IP
O
1
Type
VCCT
VCCR
VCCD
VCCIO
GNDD
GNDA
GNDS
I
I
I
I
I
I
I
-
Symbol
1
Test Data Input. Test data sampled with respect to the rising edge of TCK.
Test Data Output. Test data driven with respect to the falling edge of TCK.
Test Mode Select.
Test Clock. Clock for JTAG test (REFCLK).
Test Reset. Reset input for JTAG test.
Address <4:0>. Sets base address. Each port adds its port number to this
address to determine its PHY address.
Port 0 Address = Base + 0.
Port 1 Address = Base + 1.
Port 2 Address = Base + 2.
Port 3 Address = Base + 3.
Port 4 Address = Base + 4.
Port 5 Address = Base + 5.
Bias. This pin provides bias current for the internal circuitry. Must be tied to
ground through a 22.1 k Ω , 1% resistor.
Reference Clock. A 25 MHz clock is required at this pin.
No Connection. These pins should be left floating.
Type
-
-
-
-
-
-
-
Transmitter Supply. +3.3V supply for analog circuits.
Receiver Supply. +3.3V supply for analog circuits.
Digital Power Supply - Core. +3.3V supply for core digital
circuits.
Digital Power Supply - I/O Ring. 3.3V supply for digital
I/O circuits. Regardless of the IO supply, digital I/O pins remain
tolerant of 5V signal levels.
Digital Ground. Ground return for both core and I/O digital
supplies (VCCD and VCCIO).
Analog Ground. Ground return for analog supply.
Substrate Ground. Ground for chip substrate.
Signal Description
Signal Description
Signal Description
2
Datasheet