lxt9763 Intel Corporation, lxt9763 Datasheet - Page 27

• Manufacturer Part Number: lxt9763
• Description: Fast Ethernet 10/100 Hex Transceiver With Full Mii
• Manufacturer: Intel Corporation

1.9.5
1.9.6
1.9.7
1.9.7.1
1.9.7.2
Datasheet
Figure 12. Loopback Paths
Carrier Sense
Carrier sense (CRS) is an asynchronous output. It is always generated when a packet is received
from the network and in some modes when a packet is transmitted.
On transmit, CRS is asserted on a 10 Mbps or 100 Mbps half-duplex link. Carrier sense is not
generated on transmit when the link is operating in full-duplex mode.
Collision
The LXT9763 asserts its collision signal, asynchronously to any clock, whenever the line state is
half-duplex and the transmitter and receiver are active at the same time.
conditions for assertion of carrier sense, collision, and data loopback signals.
Loopback
The LXT9763 provides two loopback functions, operational and test (see
Operational Loopback
Operational loopback is provided for 10 Mbps half-duplex links when bit 16.8 = 0. Data
transmitted by the MAC (TXData) will be looped back on the receive side of the MII (RXData).
Operational loopback is not provided for 100 Mbps links, full-duplex links, or when 16.8 = 1.
Test Loopback
A test loopback function is provided for diagnostic testing of the LXT9763. During test loopback,
twisted-pair and fiber interfaces are disabled. Data transmitted by the MAC is internally looped
back by the LXT9763 and returned to the MAC.
Test loopback is available for 100TX, 100FX, and 10T operation. Test loopback is enabled by
setting bit 0.14 = 1, bit 0.8 = 1 (full-duplex), and bit 0.12 = 0 (disable auto-negotiation). Loopback
paths are shown in
LXT9763
MII
Loopback
10T
Figure
Digital
Block
Fast Ethernet 10/100 Hex Transceiver with Full MII — LXT9763
12.
Loopback
100X
Analog
Block
FX Driver
TX Driver
Table 8
Table
8).
summarizes the
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