lxt9763 Intel Corporation, lxt9763 Datasheet - Page 19

• Manufacturer Part Number: lxt9763
• Description: Fast Ethernet 10/100 Hex Transceiver With Full Mii
• Manufacturer: Intel Corporation

1.3.0.1
.
Datasheet
MDIO
(Read)
MDC
High Z
Figure 4. Port Address Scheme
Figure 5. Management Interface Read Frame Structure
Preamble
32 "1"s
MII Interrupts
The LXT9763 provides a single interrupt pin available to all ports. Interrupt logic is shown in
Figure
provides interrupt enable and mask functions and Register 19 provides interrupt status. Setting bit
18.1 = 1, enables a port to request interrupt via the MDINT pin. An active Low on this pin indicates
a status change on the LXT9763. However, because it is a shared interrupt, it does not indicate
which port is requesting service. Interrupts may be caused by one of four conditions:
•
•
•
•
0
Auto-negotiation complete
Speed status change
Duplex status change
Link status change
ST
LXT9763
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
7. The LXT9763 also provides two dedicated interrupt registers for each port. Register 18
1
1
Op Code
BASE ADDR
(ex. ADDR=4)
PHY ADDR (BASE+0)
ex. 4
PHY ADDR (BASE+1)
ex. 5
PHY ADDR (BASE+2)
ex. 6
PHY ADDR (BASE+3)
ex. 7
PHY ADDR (BASE+4)
ex. 8
PHY ADDR (BASE+5)
ex. 9
0
Write
A4
Fast Ethernet 10/100 Hex Transceiver with Full MII — LXT9763
PHY Address
A3
A0
R4
Register Address
R3
R0
Z
Around
Turn
0
D15
D15
D14
Data
Read
D14
D1
D1
D0
Idle
19