MM74HCT00MTCX Fairchild Semiconductor, MM74HCT00MTCX Datasheet
MM74HCT00MTCX
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MM74HCT00MTCX Summary of contents
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... All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View ©1984 Fairchild Semiconductor Corporation MM74HCT00 Rev. 1.3.0 General Description The MM74HCT00 is a NAND gates fabricated using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOS— ...
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... Symbol V Supply Voltage Input or Output Voltage IN OUT T Operating Temperature Range Input Rise or Fall Times r f ©1984 Fairchild Semiconductor Corporation MM74HCT00 Rev. 1.3.0 (1) Parameter Parameter 2 Rating –0.5 to +7.0V –1 +1.5V CC –0 +0.5V CC ±20mA ±25mA ±50mA –65°C to +150°C ...
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... Minimum HIGH Level OH Output Voltage V Maximum LOW Level OL Voltage I Maximum Input IN Current I Maximum Quiescent CC Supply Current Note: 3. This is measured per input with all other inputs held at V ©1984 Fairchild Semiconductor Corporation MM74HCT00 Rev. 1.3.0 T 25°C A Conditions Typ. 2.0 0 – 0.1 IN ...
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... Maximum Output Rise and THL TLH Fall Time C Power Dissipation PD Capacitance C Input Capacitance IN Note determines the no load dynamic power consumption current consumption ©1984 Fairchild Semiconductor Corporation MM74HCT00 Rev. 1.3.0 = 25°C (unless otherwise noted) A Conditions = 50pF (unless otherwise noted Conditions Typ ( ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...