SC92031L SILAN [Silan Microelectronics Joint-stock], SC92031L Datasheet - Page 4

• Manufacturer Part Number: SC92031L
• Description: 10/100 MBPS INTEGRATED PCI ETHERNET MEDIA ACCESS CONTROLLER AND PHYSICAL LAYER
• Manufacturer: SILAN [Silan Microelectronics Joint-stock]

PIN CONFIGURATION
PIN DESCRIPTION
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
PCI Interface
100, 1, 3-5, 7-9,
37, 40, 41, 43,
22-29, 32, 35-
88, 89, 91-96,
Pin No.
82
83
44
RSI_RST
PCI_CLK
C/BE3B
REQB2
G_RST
GNTB2
INTAB
IDSEL
GNTB
REQB
PMEB
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
GND
ACT
V
V
SE
DD
DD
100
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
75
1
PCI_RST
PCI_CLK
74
2
Symbol
AD31-0
73
3
72
4
71
5
70
6
When RSTB is asserted low, the SC92031 performs internal system
hardware reset. RSTB must be held for a minimum of 120 ns.
This PCI Bus clock provides timing for all transactions and bus phases, and
is input to PCI devices. The rising edge defines the start of each phase. The
clock frequency ranges from 0 to 33MHz.
PCI address and data multiplexed pins.
Pins AD31-24 are shared with Boot ROM data pins, while AD16-0 are
shared with Boot ROM address pins.
69
7
68
8
67
9
66
10
65
11
SC92031L
64
12
63
13
62
14
61
15
60
16
59
17
Description
58
18
57
19
56
20
55
21
54
22
53
23
52
24
REV:1.0
51
25
26
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
CLKR
AUX
EECS
EECK
EEDI
EEDO
AD0
AD1
V
AD2
AD3
GND
GND
AD4
AD5
AD6
ROM_OE
V
AD7
C/BE0B
GND
AD8
AD9
AD10
AD11
DD
DD
SC92031
(To be continued)
Page 4 of 38
2004.08.03