lxt6155 Intel Corporation, lxt6155 Datasheet - Page 11

• Manufacturer Part Number: lxt6155
• Description: 155 Mbps Sdh/sonet/atm Transceiver
• Manufacturer: Intel Corporation

Datasheet
1. DI = Digital Input; DO = Digital Output; DI/O = Digital Input/Output; AI = Analog Input; AO = Analog Output; AI/O = Analog Input/Output; S=Supply.
2. TTL = Transistor-to-Transistor Logic (5V tolerant); LVPECL = Low-Voltage positive ECL.
Pin #
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
Table 1.
ADDR0/RLIS
ADDR1/LLIS
CMIERR
TRING0
Symbol
RAGND
RAGND
HWSEL
RAVCC
RRING
ROFP/
RXISH
VBIAS
TGND
LOCK
WELL
TTIP0
LXT6155 Pin Descriptions (Continued)
ATST
RTIP
LOS
SUB
I/O
DO
DO
DO
AO
A0
DI
DI
DI
AI
AI
S
S
S
S
S
S
-
1
Analog
Analog
Analog
Type
TTL
TTL
TTL
TTL
TTL
TTL
2
Receive Output Frame Pulse. In hardware mode (HWSEL = Low), this
pin is asserted (High) on the last A2 byte in the (A1.....A1, A2.....A2)
sequence in the RPOD<7:0> traffic. A1=1111,0110 and A2=0010,1000 in
binary. In software mode (HWSEL = High), this position is
programmable. During coax operation, when frame detection is disabled
(RIFE = 0 in HW/Reg #12, bit3 = 0), or in serial mode, this pin indicates
CMI line code errors. These pulses are 50 ns wide (active high). One or
more errors in 16 consecutive bits will causes a single pulse.
Receive Output PLL Lock. A High indicates receive PLL has locked to
incoming data. A Low indicates receive PLL is not locked.
Loss of Signal. An alarm output signal (high) indicating incoming signal
voltage is weak or incoming data does not contain enough transitions. In
software mode (HWSEL = 1) this pin can be configured to combine LOS
and LOCK alarms.
Receive Analog Power Supply.
Analog Test. For factory test purposes only; do not connect.
Bias Input Voltage. This pin requires a 15K (1%) pull-down resistor to
RAGND.
Rx PLL External Cap. Connecting a capacitor to RAGND from this pin
controls the Rx PLL transfer function. This pin requires a 330nF cap to
RAGND.
Receive Analog Ground.
Receive Input Data, positive (RTIP) and negative (RRING). Accepts
incoming signals (LVPECL or CMI) from the line interface.
Receive Analog Ground.
Address 0, software mode (HWSEL = High). This pin together with
ADDR1 sets the chip select address. Up to 4 LXT6155 chips can be
addressed by the P interface.
Remote Loopback Input Select, hardware mode (HWSEL = Low).
Together with LLIS sets LXT6155 in a loopback test mode. See Table 4
Address 1, software mode (HWSEL = High). This pin together with
ADDR0 sets the chip select address. Up to 4 LXT6155 chips can be
addressed by the P interface.
Local Loopback Input Select, hardware mode (HWSEL = Low).
Together with RLIS sets the LXT6155 in remote loopback mode. See
Table 4
Hardware/Software Mode Select. When HWSEL = High, LXT6155
enters software (host) mode, and is ready to communicate with a serial
microprocessor. When HWSEL = Low, LXT6155 operates in hardware
standalone mode (without a serial P).
Reserved. Must be connected to GND.
Reserved. Must be connected to VCC.
Transmit Analog Ground.
Transmit Output Data, positive (TTIP0) and negative (TRING0).
Differential CMI driver outputs for coax interface.
155 Mbps SDH/SONET/ATM Transceiver — LXT6155
Description
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