lxt6155 Intel Corporation, lxt6155 Datasheet - Page 30

• Manufacturer Part Number: lxt6155
• Description: 155 Mbps Sdh/sonet/atm Transceiver
• Manufacturer: Intel Corporation

30
LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver
Bit
5:3
Bit
5:2
Bit
5:2
1:0
Bit
7
6
2
1
0
7
6
1
0
7
6
7
6
Table 17. Rx PLL 2, Register #9 (Address A<3:0>=1001)
Table 18. Test, Register #10 (Address A<3:0>=1010)
Table 19. Register, Bias and Fuse Controls, Register #11 (Address A<3:0>=1011)
Table 20. Rx Digital 1, Register #12 (Address A<3:0>=1100)
Default
Default
Default
Default
0.0.0.0
1.0.0.0
0.1.1
0.0
1
1
1
1
1
1
0
1
0
0
1
0
1
.
los_amp_trim
freq_det_pw
los_clk_ena
bias_pwrdn
Mnemonic
Mnemonic
Mnemonic
Mnemonic
los_format
reg_reset
Not for customer use
Not for customer use
Frequency detector output pulse width ({1 to 8} * 6.43 ns)
Not for customer use
Not for customer use
Not for customer use
Enables Rx clock switching under LOS/LOCK condition:
0 = disable
1 = enable
Not for customer use
Not for customer use
Not for customer use
Not for customer use
Power down all bias generators. This bit can be used to power down all the active
analog circuitry on the device.
0= active
1=power down
Register array reset, ignores remainder of transaction (active low). This register is
write only.
Not for customer use
Not for customer use
Combine (logical OR) LOS/LOCK function onto LOS pin:
0 = disable
1 = enable
Amplitude LOS threshold trim:
0 = Reduced ALOS dessert threshold (-3db)
1 = Nominal ALOS thresholds
Description
Description
Description
Description
Datasheet