ADMC401-PB Analog Devices, ADMC401-PB Datasheet - Page 41

• Manufacturer Part Number: ADMC401-PB
• Description: Single-Chip/ DSP-Based High Performance Motor Controller
• Manufacturer: Analog Devices

ETU REGISTERS
The configuration of the ETU registers is shown at the end of
the data sheet.
AUXILIARY PWM TIMERS
The ADMC401 provides two variable-frequency, variable duty-
cycle, 8-bit, auxiliary PWM outputs that are available at the
AUX1 and AUX0 pins. These auxiliary PWM outputs can be
used to provide switching signals to other circuits in a typical
motor control system such as power factor corrected front-end
converters or other switching power converters. Alternatively,
by addition of a suitable filter network, the auxiliary PWM out-
put signals can be used as simple single-bit digital-to-analog
converters.
The auxiliary PWM system of the ADMC401 can operate in
two different modes, independent mode or offset mode. The oper-
ating mode of the auxiliary PWM system is controlled by Bit 8
of the MODECTRL register. Setting Bit 8 of the MODECTRL
register places the auxiliary PWM system in the independent
mode. In this mode, the two auxiliary PWM generators are
completely independent, and separate switching frequencies and
duty cycles may be programmed for each auxiliary PWM out-
put. In this mode, the 8-bit AUXTM0 register sets the switch-
ing frequency of the signal at the AUX0 output pin. Similarly,
the 8-bit AUXTM1 register sets the switching frequency of the
signal at the AUX1 pin. The fundamental time increment for
the auxiliary PWM outputs is twice the DSP instruction rate (or
2t
Since the values in both AUXTM0 and AUXTM1 can range
from 0 to 0xFF, the achievable switching frequency of the auxil-
iary PWM signals may range from 50.8 kHz to 13 MHz for a
CLKOUT frequency of 26 MHz.
The on-time of the two auxiliary PWM signals are programmed
by the two 8-bit AUXCH0 and AUXCH1 registers, according
to:
so that output duty cycles from 0% to 100% are possible. Duty
cycles of 100% are produced if the on-time value exceeds the
period value. Typical auxiliary PWM waveforms in independent
mode are shown in Figure 33(a).
When Bit 8 of the MODECTRL register is cleared, the auxiliary
PWM channels are placed in offset mode. In offset mode, the
switching frequency of the two signals on the AUX0 and AUX1
pins are identical and controlled by AUXTM0 in a manner
similar to that previously described for independent mode. The
on-times of both the AUX0 and AUX1 signals are controlled by
the AUXCH0 and AUXCH1 registers as before. However, in
CK
) so that the corresponding switching periods are given by:
T
T
T
T
AUX
AUX
ON AUX
ON AUX
,
,
1
0
=
=
2
2
1
0
×
×
=
=
(
(
2
2
AUXTM
AUXTM
×
×
AUXCH
AUXCH
1 1
0
+
+
1
0
1
)
)
×
×
×
×
t
t
CK
t
CK
t
CK
CK
this mode, the AUXTM1 register defines the offset time from
the rising edge of the signal on the AUX0 pin to that on the
AUX1 pin, according to:
For correct operation in this mode, the value written to the
AUXTM1 register must be less than the value written to the
AUXTM0 register. Typical auxiliary PWM waveforms in offset
mode are shown in Figure (33)b. Again, duty cycles from 0% to
100% are possible in this mode.
In both operating modes, the resolution of the auxiliary PWM
system is 8-bit only at the minimum switching frequency
(AUXTM0 = AUXTM1 = 255 in independent mode, AUXTM0
= 255 in offset mode). Obviously, as the switching frequency is
increased, the resolution is reduced.
Values can be written to the auxiliary PWM registers at any
time. However, new duty cycle values written to the AUXCH0
and AUXCH1 registers only become effective at the start of the
next cycle. Writing to the AUXTM0 and AUXTM1 registers
causes the internal timers to be reset to 0 and new PWM cycles
to begin, only in independent mode.
By default, following reset, Bit 8 of the MODECTRL
register is cleared and offset mode is enabled. AUXTM0 and
AUXTM1 default to 0xFF corresponding to minimum switch-
ing frequency and zero offset. The on-time registers AUXCH0
and AUXCH1 default to 0x00.
AUXILIARY PWM REGISTERS
The registers of the auxiliary PWM system are illustrated at the
end of the data sheet.
AUX0
AUX1
AUX0
AUX1
2
2
AUXCH0
AUXCH0
T
OFFSET
2
(AUXTM1+1)
= ×
2
2
2
2
(
(AUXTM0+1)
(AUXTM0+1)
AUXTM
AUXCH1
2
(AUXTM0+1)
2
1 1
+ ×
(AUXTM1+1)
)
2
ADMC401
t
AUXCH1
CK
(b)
(a)