ADMC401-PB Analog Devices, ADMC401-PB Datasheet - Page 5

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ADMC401-PB

Manufacturer Part Number
ADMC401-PB
Description
Single-Chip/ DSP-Based High Performance Motor Controller
Manufacturer
Analog Devices
Datasheet
Parameter
Clock Signals
t
with a frequency equal to half the instruction rate; a 13 MHz
clock (which is equivalent to 76.9 ns) yields a 38.5 ns processor
cycle (equivalent to 26 MHz). t
0.5t
parameters to obtain specification value.
Example: t
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
t
Control Signals
Timing Requirement:
t
PWM Shutdown Signals
Timing Requirements:
t
t
ADC Signals
Timing Requirements:
t
t
NOTE
1
Applies after power-up sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal
CK
CKI
CKIL
CKIH
CKL
CKH
CKOH
RSP
PWMTPW
PIOPWM
CSI
CSE
oscillator start-up time).
is defined as 0.5t
CKI
period should be substituted for all relevant timing
CKH
= 0.5t
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
RESET Width Low
PWMTRIP Width Low
PIO Width Low
Internal Convert Start Width High
External Convert Start Width High
CK
CKI.
– 10 ns = 0.5 (38.5 ns) – 10 ns = 9.25 ns.
The ADMC401 uses an input clock
CLKOUT
CLKIN
CK
values within the range of
t
CKIL
t
CKI
t
CKL
Min
76.9
20
20
0.5t
0.5t
0
5t
t
2t
2t
2t
CK
t
CKOH
CK
CK
CK
CK
t
CKH
CK
CK
1
– 10
– 10
t
CKIH
Max
20
150
ADMC401
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit

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