CY7C1329-100AI CYPRESS [Cypress Semiconductor], CY7C1329-100AI Datasheet - Page 12

• Manufacturer Part Number: CY7C1329-100AI
• Description: 64K x 32 Synchronous-Pipelined Cache RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05279 Rev. *B
Switching Waveforms
Pipeline Timing
Notes:
18. Device originally deselected.
19. CE is the combination of CE
ADV
ADSP
ADSC
Data In/Out
CE
CE
OE
WE
ADD
CLK
1
t
ADS
RD1
t
AS
ADSC initiated Reads
t
t
CLZ
CO
[18,19]
RD2
t
ADSP initiated Reads
2
Back to Back Reads
CES
and CE
Out
RD3
1a
(continued)
3
. All chip selects need to be active in order to select the device.
Out
RD4
2a
Out
3a
= DON’T CARE
ADSP ignored
with CE
t
CH
Out
4a
1
HIGH
t
t
CYC
ADH
= UNDEFINED
t
WES
1a
In
WD1
t
t
CEH
CL
t
DOH
WD2
2a
In
t
WEH
WD3
3a
In
t
CHZ
WD4
4a
In
D(C)
CY7C1329
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