CY7C1329-100AI CYPRESS [Cypress Semiconductor], CY7C1329-100AI Datasheet - Page 13

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CY7C1329-100AI

Manufacturer Part Number
CY7C1329-100AI
Description
64K x 32 Synchronous-Pipelined Cache RAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document #: 38-05279 Rev. *B
Switching Waveforms
ZZ Mode Timing
Ordering Information
Notes:
20. Device must be deselected when entering ZZ mode. See Cycle Description table for all possible signal conditions to deselect the device.
21. I/Os are in three-state when exiting ZZ sleep mode.
Speed
(MHz)
CLK
ADSP
CE
CE
I
ZZ
I/Os
ADSC
CE
133
100
DD
1
2
3
CY7C1329-133AC
CY7C1329-100AC
CY7C1329-100AI
Ordering Code
[20, 21]
(continued)
HIGH
LOW
HIGH
I
Three-state
DD
(active)
Package
Name
A101
A101
A101
t
ZZS
100-lead Thin Quad Flat Pack
100-lead Thin Quad Flat Pack
100-lead Thin Quad Flat Pack
I
DDZZ
Package Type
t
ZZREC
CY7C1329
Commercial
Page 13 of 15
Operating
Industrial
Range

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