PCF8531U2D NXP [NXP Semiconductors], PCF8531U2D Datasheet - Page 22
PCF8531U2D
Manufacturer Part Number
PCF8531U2D
Description
34 x 128 pixel matrix driver Single-chip LCD controller and driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCF8531U2D.pdf
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NXP Semiconductors
PCF8531
Product data sheet
9.7 Set bias system
The bias voltage levels are set in the ratio of R − R − n × R − R − R (see
Different multiplex rates require different bias settings. Bias settings are programmed by
BS[2:0], which sets the binary number n. The optimum value for n is given by:
Supported values of n are given in
Table 8.
n
BS[2:0]
000
001
010
011
100
101
110
111
Fig 11. Voltage divider chain
=
muxrate 3
Programming the required bias system
–
All information provided in this document is subject to legal disclaimers.
n
7
6
5
4
3
2
1
0
Rev. 6 — 16 May 2011
Table
R
R
n × R
R
R
Bias system
1
1
1
1
1
1
1
1
⁄
⁄
⁄
⁄
⁄
⁄
⁄
⁄
11
10
9
8
7
6
5
4
8.
Table 9
V
V
V
V
V
V
013aaa183
1
2
3
4
5
6
= V
= V
shows the intermediate bias voltages.
LCD
SS
Comment
-
-
-
-
recommended for 1:34
recommended for 1:26
recommended for 1:17
recommended for icon mode
34 x 128 pixel matrix driver
PCF8531
© NXP B.V. 2011. All rights reserved.
Figure
11).
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