PCF88332DA PHILIPS [NXP Semiconductors], PCF88332DA Datasheet - Page 50

• Manufacturer Part Number: PCF88332DA
• Description: STN RGB - 132 X 132 X 3 driver
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
6.2.34
The Super frame inversion command (FINV), which is the inversion of the row functions after all rows are written to can
be switched off for the PCF8833. When switched off, the inversion of the row functions will then only be done with N-line
inversion. Inversion of the row functions is needed so as to avoid a DC component over the LCD display. A detailed
description of the N-line inversion is given in Section 6.2.45.
The FINV control bit reset state is defined in Table 52.
Table 52 Super frame inversion register bits
Table 53 Super frame inversion reset state
6.2.35
The data order (DOR) of the data which will be written into the RAM can be changed (swapped).
The DOR command is explained and the reset state defined in Table 55.
Table 54 Data order register bits
Table 55 Data order reset state
6.2.36
The PCF8833 incorporates a temperature segmented frame frequency programming; see Section 6.2.41. This
segmented frame frequency can be disabled by using the temperature compensated frame frequency (TCDFE)
command.
The TCDFE control bit reset state is defined in Table 57.
When the non-segmented frame frequency is chosen, the frame frequency in segment B (DFB) is valid;
see Section 6.2.41.
Table 56 Temperature compensated frame frequency register bits
2003 Feb 14
STN RGB - 132
FINV
DOR
D/C
D/C
D/C
BIT
BIT
0
0
0
S
D
T
EMPERATURE COMPENSATED FRAME FREQUENCY
UPER FRAME INVERSION
ATA ORDER
7
1
7
1
7
1
super frame inversion is off
LOGIC 0 (RESET STATE)
6
0
6
0
6
0
132
normal data order
LOGIC 0
3 driver
5
1
5
1
5
1
4
1
4
1
4
1
50
3
1
3
1
3
1
MSB/LSB transposed for RAM data
2
0
2
0
2
1
super frame inversion is on
LOGIC 1 (RESET STATE)
LOGIC 1
1
1
1
0
1
0
Objective specification
TCDFE
FINV
DOR
0
0
0
PCF8833
DEFAULT
DEFAULT
DEFAULT
BAH
BDH
B9H