AD9874BST AD [Analog Devices], AD9874BST Datasheet - Page 21

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AD9874BST

Manufacturer Part Number
AD9874BST
Description
IF Digitizing Subsystem
Manufacturer
AD [Analog Devices]
Datasheet
Figure 7c. CLK Phase Noise vs. Charge Pump Setting Bias
(CLK SYN Settings: CKO Bias = 3, CKR = 56, and CKN = 60
with f
Address Bit
(Hex)
0x00
0x01
0x10
0x11
0x12
0x13
0x14
0x15
0x16
IF LNA/MIXER
The AD9874 contains a single-ended LNA followed by a Gilbert-
type active mixer, shown in Figure 8 with the required external
components. The LNA uses negative shunt feedback to set its
input impedance at the IFIN Pin, thus making it dependent on the
LNA bias setting and input frequency. It can be modeled as
approximately 370 Ω//1.4 pF ( 20%) for the higher bias settings
below 100 MHz. Figures 9a and 9b show the equivalent input
impedance versus frequency characteristics of the AD9874 with
all the LNA bias settings. The increase in shunt resistance ver-
sus frequency can be attributed to the reduction in bandwidth,
thus the amount of negative feedback of the LNA. Note, the
input signal into IFIN should be ac-coupled via a 10 nF capaci-
tor since the LNA input is self-biasing.
REV. 0
Table VIII. SPI Registers Associated with CLK Synthesizer
REF
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
= 100kHz)
0
–25
Breakdown Width
(7:0)
(3:2)
(5:0)
(7:0)
(4:0)
(7:0)
(6)
(5)
(4:2)
(1:0)
(3:0)
(7:0)
–20
–15
CKI = 2
CKI = 0
–10
FREQUENCY OFFSET – kHz
8
2
6
8
5
8
1
1
3
1
4
8
–5
0
Default
Value
0xFF
0
00
0x38
0x00
0x3C
0
0
0
0
0x0
0x04
CKI = 4
5
CKI = 6
10
EXT CLK
15
Name
STBY
CKOB
CKR(13:8)
CKR(7:0)
CKN(12:8)
CKN(7:0)
CKF
CKINV
CKI
CKTM
CKFA(13:8)
CKFA(7:0)
20
25
–21–
IFIN
Figure 8. Simplified Schematic of AD9874’s LNA/Mixer
R
F
Figure 9a. The Shunt Input Resistance vs. the
Frequency of the AD9874’s IF1 Input
VDDI
2.5
2.0
1.5
1.0
0.5
600
550
500
450
400
350
300
0
R
R
0
GAIN
BIAS
0
Figure 9b. The Shunt Capacitance vs.
the Frequency of the AD9874’s IF1 Input
LNA BIAS = 1
50
50
CXVL
MXOP
100
100
L
LNA BIAS = 0
FREQUENCY – MHz
FREQUENCY – MHz
MULTI-TANH
V–I STAGE
150
2.7V TO 3.6V
150
LNA BIAS = 0
LNA BIAS = 2
C
50
LNA BIAS = 1
200
200
LNA BIAS = 3
M X ON
L
250
250
DC SERVO
LOOP
LNA BIAS = 3
LNA BIAS = 2
AD9874
300
300
CXIF
LO INPUT =
0.3V p-p TO
1.0V p-p
CXVM
350
350

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