AD9874BST AD [Analog Devices], AD9874BST Datasheet - Page 32

• Manufacturer Part Number: AD9874BST
• Description: IF Digitizing Subsystem
• Manufacturer: AD [Analog Devices]

AD9874
Many applications have frequency plans that take advantage of
industry-standard IF frequencies due to the large selection of
low cost crystal or SAW filters. If the selected IF frequency and
ADC clock rate result in a problematic spurious component, an
alternative ADC clock rate should be selected by slightly modi-
fying the decimation factor and CLK synthesizer settings (if
used) such that the output sample rate remains the same. Also,
applications requiring a certain degree of tuning range should
take into consideration the location and magnitude of these spurs
when determining the tuning range as well as optimum IF and
ADC clock frequency.
Figure 23a plots the measured in-band noise power as a function of
the LO frequency for f
width of 150 kHz when no signal is present. Any LO frequency
resulting in large spurs should be avoided. As this figure shows,
large spurs result when the LO is f
harmonic of 18 MHz (i.e., n f
LO frequencies whose odd order harmonics (i.e., m f
harmonics of f
mixer being internally driven by a squared-up version of the LO input
consisting of the LO frequency and its odd order harmonics. These
spur frequencies can be calculated from the following relation:
where m = 1, 3, 5... and n = 1, 2, 3...
A second source of spurs is a large block of digital circuitry that
is clocked at f
this spur source are given by:
where n = 1, 2, 3 ...
Figure 23b shows that omitting the LO frequencies given by
Equation 12 for m = 1, 3, and 5 and by Equation 13 accounts
for most of the spurs. Some of the remaining low level spurs can
be attributed to coupling from the SSI digital output. As a result,
users are also advised to optimize the output bit rate (f
via the SSIORD Register) and the digital output driver strength
to achieve the lowest spurious and noise figure performance for
a particular LO frequency and f
case for very narrow-band channels in which low level spurs can
degrade the AD9874’s sensitivity performance.
Despite the many spurs, sweet spots in the LO frequency are generally
wide enough to accommodate the maximum signal bandwidth
of the AD9874. As evidence of this property, Figure 24 shows that
the in-band noise is quite constant for LO frequencies ranging
from 70 MHz to 71 MHz.
m f
f
LO
LO
=
f
=
CLK
(
n
CLK
CLK
/3
±
1 8
+
/3. Problematic LO frequencies associated with
to f
n f
)
f
CLK
CLK
CLK
CLK
/8. This spur mechanism is a result of the
±
= 18 MHz and an output signal band-
f
CLK
CLK
CLK
CLK
± f
8
setting. This is especially the
/8 = 2.25 MHz away from a
CLK
/8). Also problematic are
LO
) mix with
CLKOUT
(12)
(13)
–32–
Spurious Responses
The spectral purity of the LO (including its phase noise) is an
important consideration since LO spurs can mix with undesired
signals present at the AD9874’s IFIN input to produce an in-band
response. To demonstrate the low LO spur level introduced
within the AD9874, Figure 25 plots the demodulated output
power as a function of the input IF frequency for an LO frequency
of 71.1 MHz and a clock frequency of 18 MHz.
The two large –10 dBFS spikes near the center of the plot are the
desired responses at f
at 68.85 MHz and 73.35 MHz. LO spurs at f
result in spurious responses at offsets of ± f
responses. Close-in spurs of this kind are not visible on the plot,
but small spurious responses at f
50.85 MHz, 55.35 MHz, 86.85 MHz, and 91.35 MHz, are visible
at the –90 dBFS level. This data indicates that the AD9874 does
an excellent job of preserving the purity of the LO signal.
Figure 25 can also be used to gauge how well the AD9874 rejects
undesired signals. For example, the half-IF response (at 69.975 MHz
and 72.225 MHz) is approximately –100 dBFS, giving a selectivity
of 90 dB for this spurious response. The largest spurious response
at approximately –70 dBFS occurs with input frequencies of
70.35 MHz and 71.85 MHz. These spurs result from third
order nonlinearity in the signal path (i.e., abs [3
f
IF_Input
Figure 24. Expanded View from 70 MHz to 71 MHz
Figure 25. Response of AD9874 to a –20 dBm
Input IF Input when f
] = f
–100
–120
–50
–60
–70
–80
–90
–20
–40
–60
–80
70.0
0
50
CLK
RESPONSES
DESIRED
/8).
60
LO
± f
LO FREQUENCY – MHz
IF FREQUENCY – MHz
IF2_ADC
70
LO
= 71.1 MHz
LO
70.5
where f
± f
D =
80
IF2_ADC
f
CLK
SPUR
/4 = 4.5MHz
IF2_ADC
LO
± f
around the desired
90
± f
CLK
= f
SPUR
f
CLK
, i.e., at
LO
– 3
/8, i.e.,
71.0
would
100
REV. 0