AD9874BST AD [Analog Devices], AD9874BST Datasheet - Page 34

• Manufacturer Part Number: AD9874BST
• Description: IF Digitizing Subsystem
• Manufacturer: AD [Analog Devices]

AD9874
This second IF signal is then digitized by the - ADC, demodu-
lated into its quadrature I and Q components, filtered via matching
decimation filters, and reformatted to enable a synchronous serial
interface to a DSP. In this example, the AD9874’s LO and CLK
synthesizers are both enabled requiring some additional passive
components (for the synthesizer’s loop filters and CLK oscillator)
and a VCO for the LO synthesizer. Note, not all of the required
decoupling capacitors are shown. Refer to the previous section
and Figure 26 for more information on required external passive
components.
The selection of the first IF frequency is often based on the avail-
ability of low cost standard crystal or SAW filters as well as system
frequency planning considerations. In general, crystal filters are
often used for narrow-band radios having channel bandwidths below
50 kHz with IFs below 120 MHz, while SAW filters are more
suited for channel bandwidths greater than 50 kHz with IFs greater
than 70 MHz. The ultimate stop-band rejection required by the
IF filter will depend on how much suppression is required at the
AD9874’s image band resulting from downconversion to the
second IF. This image band is offset from the first IF by twice the
second IF frequency (i.e., ± f
injection).
INPUT
RF
PRESELECT
FILTER
Figure 27. Typical Dual Conversion Superheterodyne Application Using the AD9874
LNA
CLK
TUNER
ADF42xx
PLL SYN
/4 depending on high or low side
REFIN
VCO
OSCILLATOR
CRYSTAL
IF CRYSTAL OR
SAW FILTER
FILTER
LOOP
IF2 =
IFIN
SYNTH.
f
–16dB
LO
LNA
CLK
/8
VCO
–34–
VDDA
FILTER
LOOP
The selectivity and bandwidth of the IF filter will depend on both
the magnitude and frequency offset(s) of the adjacent channel
blocker(s) that could overdrive the AD9874’s input or generate
in-band intermodulation components. Further suppression is
performed within the AD9874 by its inherent band-pass response
and digital decimation filters. Note, some applications will require
additional application-specific filtering performed in the DSP
that follows the AD9874 to remove the adjacent channel and/or
implement a matched filter for optimum signal detection.
The output data rate of the AD9874, f
be at least twice the bandwidth or symbol rate of the desired signal
to ensure that the decimation filters provide a flat pass-band
response as well as to allow for post-processing by a DSP. Once
f
should be set such that the input clock rate, f
the AD9874’s rated operating range of 13 MHz–26 MHz and no
significant spurious products related to f
desired pass band resulting in a reduction in sensitivity perfor-
mance. If a spurious component is found to limit the sensitivity
performance, the decimation factor can often be modified
slightly to find a “spurious free” pass band. In general, selecting
OUT
SAMPLE CLOCK
is determined, the decimation factor of the digital filters
SYNTHESIZER
- ADC
DAC AGC
REFERENCE
DECIMATION
VOLTAGE
FILTER
VDDC
CONTROL LOGIC
FROM DSP
FORMATTING/SSI
AD9874
SPI
OUT
, should be chosen to
CLKOUT
CLK
DOUTA
DOUTB
CLK
FS
fall within the
, falls between
TO
DSP
REV. 0