STLC5412FN STMICROELECTRONICS [STMicroelectronics], STLC5412FN Datasheet - Page 51

• Manufacturer Part Number: STLC5412FN
• Description: 2B1Q U INTERFACE DEVICE ENHANCED WITH DECT MODE
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

MWPS Micro Wire Port Select register (Signifi-
cant in microwire mode only).
(write only)
Default value: Mode A (5410 compatible)
Note: Soft Reset has no effect on the select
mode.
BAUD DELAY Register (DBAUD)
After reset: 00H
8 bits read-only register that provides the round
trip bauds delay (12.5usec step). It is significant in
LT mode only. The register is split in two sections:
DBAUD4..DBAUD0: 5 bits counter of bauds delay
between SFSx and SFSr rising edges (total digi-
tal delay: tdd ).
DBAUD7..DBAUD5: 3 bits to store the internal
elastic memory (FIFO) state. The table A shows
the coding of the 3-stages elastic memory (elas-
tic digital delay: edd).
DBAUD7 DBAUD6 DBAUD5 DBAUD4 DBAUD3 DBAUD2 DBAUD1 DBAUD0
– Writting FFH value select the mode B to ex-
– Writing 00H value select the mode A (See Mi-
change data onto CI & CO
crowire control interface paragraph for more
details Mode A, Mode B).
Table A.
-2: 2 bauds have to be subtracted from bauds
counter value (DBAUD4..DBAUD0)
-1: 1 baud has to be subtracted to bauds counter
value (DBAUD4..DBAUD0)
0: no correction
All other FIFO states are used during activation
procedure. Once PLL2 is frozen you can be only
in one of the 3 states in table A.
TX RX Clocks Different Register (DTXRX)
After reset: 00H
8bits read-only register that provides the phase
difference between transmit clock and receive re-
covered clock by PLL2 in steps of 65.1 nsec.
( clock elastic delay: ced ). The register is signifi-
cant in LT mode only.
7
FIFO state
6
000
010
110
5
4
3
baud delay (edd)
2
-1
-2
0
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