DAC1408D650HW/C1 NXP [NXP Semiconductors], DAC1408D650HW/C1 Datasheet - Page 36
![no-image](/images/no-image-200.jpg)
DAC1408D650HW/C1
Manufacturer Part Number
DAC1408D650HW/C1
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650HWC1.pdf
(88 pages)
- Current page: 36 of 88
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Table 18.
Address Register name
0
1
2
3
4
5
6
7
8
9
10 0Ah DAC_A_CFG_2
11 0Bh DAC_A_CFG_3
12 0Ch DAC_B_CFG_1
13 0Dh DAC_B_CFG_2
14 OEh DAC_B_CFG_3
15 OFh DAC_CFG
26 1Ah DAC_A_AUX_MSB R/W
27 1Bh DAC_A_AUX_LSB R/W DAC_A_AUX_PD
28 1Ch DAC_B_AUX_MSB R/W
29 1Dh DAC_B_AUX_LSB R/W DAC_B_AUX_PD
31 1Fh PAGE_ADDRESS
00h COMMON
01h TXCFG
02h PLLCFG
03h FREQNCO_LSB
04h FREQNCO_LISB
05h FREQNCO_UISB
06h FREQNCO_MSB
07h PHINCO_LSB
08h PHINCO_MSB
09h DAC_A_CFG_1
10.15.2.1 Page 0 allocation map description
Page 0 register allocation map
R/W Bit definition
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
b7
DAC_A_PD
DAC_B_PD
DAC_A_GAIN_COARSE[7:6]
DAC_A_GAIN_COARSE[9:8]
DAC_B_GAIN_COARSE[7:6]
DAC_B_GAIN_COARSE[9:8]
NCO_EN
SPI_3W
PD_PLL
-
b6
NCO_LOWPOW
DAC_A_SLEEP
DAC_B_SLEEP
SPI_RST
ER_SEL
-
-
-
-
b5
INV_SINE_EN
PD_PLL_IO
-
-
-
-
FREQ_NCO[15:18]
FREQ_NCO[23:16]
FREQ_NCO[31:24]
DAC_A_AUX[9:2]
DAC_B_AUX[9:2]
FREQ_NCO[7:0]
PHI_NCO[15:8]
PHI_NCO[7:0]
PAGE
b4 b3
-
-
-
-
PLL_DIV[1:0]
INTERLEAVED_
DAC_A_GAIN_FINE[5:0]
DAC_B_GAIN_FINE[5:0]
MODE[2:0]
DAC_A_OFFSET[5:0]
DAC_B_OFFSET[5:0]
DA_A_OFFSET[11:6]
DA_B_OFFSET[11:6]
MODE
-
-
-
b2
PLL_PHASE_SEL
DF
-
-
-
b1
MINUS3DB NOISESHA
[1:0]
PD_ALL
DAC_A_AUX[1:0]
DAC_B_AUX[1:0]
INT_FIR[1:0]
b0
PLL_POL
PD_GAP
PER
Default
Bin
10001100 8Ch
00000001 01h
00000000 00h
01100110 66h
01100110 66h
01100110 66h
00100110 26h
00000000 00h
00000000 00h
00000000 00h
01000000 40h
11000000 C0h
00000000 00h
11000000 40h
11000000 C0h
11000000 00h
10000000 80h
00000000 00h
10000000 80h
00000000 00h
00000000 00h
Hex
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