DAC1408D650HW/C1 NXP [NXP Semiconductors], DAC1408D650HW/C1 Datasheet - Page 60
DAC1408D650HW/C1
Manufacturer Part Number
DAC1408D650HW/C1
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650HWC1.pdf
(88 pages)
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NXP Semiconductors
DAC1408D650_1
Objective data sheet
Table 92.
Default settings are shown highlighted.
Table 93.
Bit
6
5
4
3 to 2 CORR_MODE[1:0] R/W
1
0
Bit
2 to 0
Symbol
NAD_ERR_CORR
KUX_CORR
NAD_CORR
IMPL_ALT
IGNORE_ERR
Symbol
PAGE
ERROR_HANDLING register (address 1Bh) bit description
PAGE_ADDRESS register (address 1Fh) bit description
Rev. 01 — 26 May 2009
Access Value
R/W
R/W
R/W
R/W
R/W
Access Value
R/W
Dual 14-bit DAC, up to 650 Msps, 2 and 4 interpolating
0
1
0
01
0
1
00
01
10
11
0
01
0
1
-
Description
Description
page_address
nit-errors passed to frame-assembler (fa‘)
nad(nit- and disparity)-errors passed to fa
unexpected k-character errors ignored (@fa)
unexpected k-character errors
concealment(2fa)
nad-errors ignored (@fa)
nad-errors concealment (@fa)
conceal 1 period @ fa
conceal 2 periods @ fa
conceal 3 periods @ fa
conceal 4 periods @ fa
default disparity error detection (table-mode)
alternative disparity error detection (cnt-mode)
no action
ignore disparity/nit-errors @ lane-controller
DAC1408D650
© NXP B.V. 2009. All rights reserved.
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