DAC1408D650HW/C1 NXP [NXP Semiconductors], DAC1408D650HW/C1 Datasheet - Page 56
DAC1408D650HW/C1
Manufacturer Part Number
DAC1408D650HW/C1
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650HWC1.pdf
(88 pages)
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NXP Semiconductors
DAC1408D650_1
Objective data sheet
Table 77.
Default settings are shown highlighted.
Bit
7 to 6 SEL_KOUT_
5 to 4 SEL_KOUT_
3 to 2 SEL_NIT_ERR_
1 to 0 SEL_NIT_ERR_
Symbol
UNEXP_LN23[1:0]
UNEXP_LN10[1:0]
LN23[1:0]
LN10[1:0]
FA_ERR_HANDLING register (address 0Bh) bit description
Rev. 01 — 26 May 2009
Access Value Description
R/W
R/W
R/W
R/W
Dual 14-bit DAC, up to 650 Msps, 2 and 4 interpolating
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
error_handling i.c.o. unexpected /K/ in lane 2 or 3
error_handling i.c.o. unexpected /K/ in lane 2 and 3
error_handling i.c.o. unexpected /K/ in lane 2
error_handling i.c.o. unexpected /K/ in lane 3
error_handling i.c.o. unexpected /K/ in lane 0 or 1
error_handling i.c.o. unexpected /K/ in lane 0 and 1
error_handling i.c.o. unexpected /K/ in lane 0
error_handling i.c.o. unexpected /K/ in lane 1
error_handling i.c.o. nit-errors in lane 2 or 3
error_handling i.c.o. nit-errors lane 2 and 3
error_handling i.c.o. nit-errors in lane 2
error_handling i.c.o. nit-errors in lane 3
error_handling i.c.o. nit-errors in lane 0 or 1
error_handling i.c.o. nit-errors lane 0 and 1
error_handling i.c.o. nit-errors in lane 0
error_handling i.c.o. nit-errors in lane 1
DAC1408D650
© NXP B.V. 2009. All rights reserved.
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