KSZ8864RMNI MICREL [Micrel Semiconductor], KSZ8864RMNI Datasheet - Page 27

no-image

KSZ8864RMNI

Manufacturer Part Number
KSZ8864RMNI
Description
Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8864RMNI
Manufacturer:
MICREL
Quantity:
7 143
September 2011
On-Chip Termination Resistors
The KSZ8864RMN reduces board cost and simplifies board layout by using on-chip termination resistors for RX/TX
differential pairs without the external termination resistors. The solution of the on chip termination and internal biasing
will enhance much power consumption compare with using external biasing and termination resistors, and the
transformer will not consume power any longer. The center tap doesn’t need to be tied to analog power, just leave
them floating or connect the capacitors to ground separately.
Functional Overview: Power Management
The KSZ8864RMN can also use multiple power level of 3.3V, 2.5V or 1.8V for VDDIO to support different I/O voltage.
The KSZ8864RMN supports enhanced power management feature in low power state with energy detection to
ensure low-power dissipation during device idle periods. There are five operation modes under the power
management function which is controlled by the Register 14 bit [4:3] and the Port Register Control 13 bit3 as shown
below:
Register 14 bit [4:3] = 00 Normal Operation Mode
Register 14 bit [4:3] = 01 Energy Detect Mode
Register 14 bit [4:3] = 10 Soft Power Down Mode
Register 14 bit [4:3] = 11 Power Saving Mode
The Port Register Control 13 bit 3 =1 is for the Port Based Power-Down Mode
Table 2 indicates all internal function blocks status under four different power management operation modes.
Normal Operation Mode
This is the default setting bit [4:3] =00 in register 14 after the chip power-up or hardware reset. When KSZ8864RMN
is in this normal operation mode, all PLL clocks are running, PHY and MAC are on and the host interface is ready for
CPU read or write.
During the normal operation mode, the host CPU can set the bit [4:3] in register 14 to transit the current normal
operation mode to any one of the other three power management operation modes.
Energy Detect Mode
The energy detect mode provides a mechanism to save more power than in the normal operation mode when the
KSZ8864RMN is not connected to an active link partner. In this mode, if the cable is not plugged, then the
KSZ8864RMN can automatically enter to a low power state, i.e., the energy detect mode. In this mode,
KSZ8864RMN will keep transmitting 120ns width pulses at 1 pulse/s rate. Once activity resumes due to plugging a
cable or attempting by the far end to establish link, the KSZ8864RMN can automatically power up to normal power
state in energy detect mode.
Internal PLL Clock
Function Blocks
KSZ8864RMN
Host Interface
Tx/Rx PHY
MAC
Normal Mode
Enabled
Enabled
Enabled
Enabled
Table 2. Internal Function Block Status
Power Saving Mode
Rx unused block
disabled
Enabled
Enabled
Enabled
Power Management Operation Modes
27
Energy Detect Mode
Energy detect at Rx
Disabled
Disabled
Disabled
Soft Power Down Mode
Disabled
Disabled
Disabled
Disabled
M9999-092011-1.4

Related parts for KSZ8864RMNI