KSZ8864RMNI MICREL [Micrel Semiconductor], KSZ8864RMNI Datasheet - Page 88

• Manufacturer Part Number: KSZ8864RMNI
• Description: Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
• Manufacturer: MICREL [Micrel Semiconductor]

September 2011
VLAN Table
The VLAN table is used for VLAN table look-up. If 802.1q VLAN mode is enabled (Register 5 bit 7 = 1), this table is
used to retrieve VLAN information that is associated with the ingress packet. The fields includes FID (filter ID), Valid
and VLAN membership need initializtion, the table is blank 4096 enties after reset, due to provide 4K spacing for the
VLAN table, there is no VID filed bits, VID is used as entries address index to input up to 4096 entries with bits [12:0]
information.
If 802.1q VLAN mode is enabled, KSZ8864RMN assigns a VID to every ingress packet when the packet is untagged
or tagged with a null VID, the packet is assigned with the default port VID of the ingress port. If the packet is tagged
with non-null VID, the VID in the tag is used. The look-up process starts from the VLAN table look-up based on VID
number. If the entry is not valid in VLAN table, the packet is dropped and no address learning occurs. If the entry is
valid, the FID is retrieved. The FID+DA and FID+SA lookups in MAC tables are performed. The FID+DA look-up
determines the forwarding ports. If FID+DA fails for look-up in MAC table, the packet is broadcast to all the members
or specified members (excluding the ingress port) based on the VLAN table. If FID+SA fails, the FID+SA is learned. If
want to communicate between different active VLANs, set same FID, otherwise set different FID.
The VLAN table configuration is organized as 1024 VLAN sets, each VLAN set consists of 4 VLAN entries, to support
up to 4096 VLAN entries. Each VLAN set has 52 bits and should be read or written at the same time specified by the
indirect address.
The VLAN entries in the VLAN set is mapped to indirect data registers as follow:
Entry0[12:0] maps to the VLAN set bits[12-0] {register119[4:0], register120[7:0]}
Entry1[12:0] maps to the VLAN set bits[25-13]{register117[1:0], register118[7:0], register119[7:5]}
Entry2[12:0] maps to the VLAN set bits[38-26]{register116[6:0], register117[7:2]}
Entry3[12:0] maps to the VLAN set bits[51-39]{register114[3:0], register115[7:0], register116[7]}
In order to read one VLAN entry, the VLAN set is read first and the specific VLAN entry information can be extracted.
To update any VLAN entry, the VLAN set is read first then only the desired VLAN entry is updated and the whole
VLAN set is written back. Due to FID in VLAN table is 7-bit, so the VLAN table supports unique 128 flow VLAN
groups. Each VLAN set address is 10 bits long (Maximum is 1024) in the indirect address register 110 and 111, the
bit [9-8] of VLAN set address is at bit [1-0] of register 110, and the bit [7-0] of VLAN set address is at bit [7-0] of
register 111. Each Write and Read can access to four consecutive VLAN entries.
Address
Format of Static VLAN Table (Support Max 4096 VLAN ID entries and 128 Active VLANs)
12
11-7
6-0
Name
Valid
Membership
FID
1, the entry is valid.
0, entry is invalid.
Specify which ports are members of the VLAN.
If a DA look-up fails (no match in both static and
dynamic tables), the packet associated with this VLAN
will be forwarded to ports specified in this field.
E.g., 11010 means Ports 4, 3, and 1 are in this VLAN.
Last bit7 is reserved
Filter ID. KSZ8864RMN supports 128 active VLANs
represented by these seven bit fields. FID is the
mapped ID. If 802.1q VLAN is enabled, the look-up will
be based on FID+DA and FID+SA.
Description
Table 14. VLAN Table
88
Mode
R/W
R/W
R/W
M9999-092011-1.4
Initial Value
suggestion
11111
0
0