KSZ8864RMNI MICREL [Micrel Semiconductor], KSZ8864RMNI Datasheet - Page 50

• Manufacturer Part Number: KSZ8864RMNI
• Description: Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
• Manufacturer: MICREL [Micrel Semiconductor]

September 2011
Global Registers
Address
Register 0 (0x00): Chip ID0
7-0
Register 1 (0x01): Revision ID / Start Switch
7-4
3-1
0
Register 2 (0x02): Global Control 0
7
6
5
Name
family ID
Reserved
Revision ID
Start Switch
New Back-off Enable
Reserved
Flush dynamic MAC table
Description
Chip family.
Reserved (Chip ID to see register 254 bit7)
Note: Port4 RMII mode will be 0110.
Revision ID
1, start the chip when external pins (PS1, PS0) = (1,0)
Note: in (PS1,PS0) = (0,0) mode, the chip will
start automatically, after trying to read the external
EEPROM. If EEPROM does not exist, the chip will use
default values for all internal registers. If EEPROM is
present, the contents in the EEPROM will be checked.
The switch will check:
(1) Register 0 = 0x95,
(2) Register 1 [7:4] = Availible chip ID.
override chip register default values =0, chip will not
start when external pins
(PS1, PS0) = (1,0) or (0,1).
Note: (PS1, PS0) = (1,1) for Factory test only.
0, stop the switch function of the chip
New Back-off algorithm designed for UNH
1 = Enable
0 = Disable
Reserved.
Flush the entire dynamic MAC table for RSTP
1 = Trigger the flush dynamic MAC table operation.
This bit is self clear
0 = normal operation
Note: All the entries associated with a port that has its
learning capability being turned off (Learning Disable)
will be flushed. If you want to flush the entire Table, all
ports learning capability must be turned off.
If this check is OK, the contents in the EEPROM will
50
Mode
(SC)
R/W
R/W
R/W
RO
RO
RO
RO
M9999-092011-1.4
Default
0100
0x95
0x0
0
0
0
0