KSZ8864RMNI MICREL [Micrel Semiconductor], KSZ8864RMNI Datasheet - Page 60

• Manufacturer Part Number: KSZ8864RMNI
• Description: Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
• Manufacturer: MICREL [Micrel Semiconductor]

September 2011
Register 17 (0x11): Reserved
Register 33 (0x21): Port 1 Control 1
Register 49 (0x31): Port 2 Control 1
Register 65 (0x41): Port 3 Control 1
Register 81 (0x51): Port 4 Control 1
Address
0
Address
7
6
5
4-0
Name
Sniffer Port
Receive Sniff
Transmit Sniff
Port VLAN Membership
Name
Two Queues Split Enable
Description
1, port is designated as sniffer port and will transmit
packets that are monitored.
0, port is a normal port.
1, all the packets received on the port will be marked
as “monitored packets” and forwarded to the
designated “sniffer port.”
0, no receive monitoring.
1, all the packets transmitted on the port will be marked
as “monitored packets” and forwarded to the
designated “sniffer port.”
0, no transmit monitoring.
Define the port’s Port VLAN membership. Bit 4 stands
for port 4, bit 3 for port 3...bit 1 for port 1, bit 0 is
reserved. The port can only communicate within the
membership. A ‘1’ includes a port in the membership, a
‘0’ excludes a port from membership.
Description
This bit0 in the register16/32/48/64/80 should be
combination with Register177/193/209/225/241 bit 1
for port 1-5 will select the split of 1/2/4 queues:
For port 1, [Register177 bit 1, Register16 bit 0] =
[11], Reserved
[10], the port output queue is split into four priority
queues or if map 802.1p to priority 0-3 mode.
[01], the port output queue is split into two priority
queues or if map 802.1p to priority 0-3 mode.
[00], single output queue on the port. There is no
priority differentiation even though packets are
classified into high or low priority.
60
Mode
Mode
R/W
R/W
R/W
R/W
R/W
M9999-092011-1.4
Default
Default
0x1f
0
0
0
0