LAN91C100-FD SMSC [SMSC Corporation], LAN91C100-FD Datasheet - Page 10

• Manufacturer Part Number: LAN91C100-FD
• Description: FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
• Manufacturer: SMSC [SMSC Corporation]

Rev. 10/14/2002
PQFP/TQFP
25, 26, 28,
PIN NO.
201
208
207
206
197
199
202
195
194
30
19
12
18
29
17
1
6
9
Transmit
Data
Carrier
Sense
Collision
Detect
Receive
Data
Transmit
Clock
Receive
Clock
Loopback
nLink
Status
nFullstep
MII Select
AUI Select
Transmit
Enable
100 Mbps
Carrier
Sense 100
Mbps
Receive
Data Valid
Collision
Detect
100 Mbps
Transmit
Data
Transmit
Clock
Receive
Clock
NAME
TXD
CRS
COL
RXD
TXC
RXC
LBK
nLNK
nFSTEP
MIISEL
AUISEL
TXEN100
CRS100
RX_DV
COL100
TXD0-
TXD3
TX25
RX25
SYMBOL
PRELIMINARY
BUFFER
pulldown
pulldown
pulldown
pulldown
pulldown
pullup
pullup
pullup
pullup
pullup
pullup
TYPE
I with
I with
I with
I with
I with
I with
I with
I with
I with
I with
I with
O12
O12
O4
O4
O4
O4
O4
Page 10
Output. NRZ Transmit Data for 10 Mbps
ENDEC interface.
Input. Carrier sense from 10 Mbps ENDEC
interface. This pin is ignored when MIISEL is
high.
Input. Collision detection indication from 10
Mbps ENDEC interface. This pin is ignored
when MIISEL is high.
Input. NRZ Receive Data from 10 Mbps ENDEC
interface. This pin is ignored when MIISEL is
high.
Input. 10 MHz transmit clock used in 10 Mbps
operation. This pin is ignored when MIISEL is
high.
Input. 10 MHz receive clock recovered by the 10
Mbps ENDEC. This pin is ignored when MIISEL
is high.
Output. Active when LOOP bit is set (TCR bit 1).
Independent of port selection (MIISEL=X).
Input. General purpose input port used to
convey LINK status (EPHSR bit 14).
Independent of port selection (MIISEL=X).
Output. Non volatile output pin. Driven by
inverse of FULLSTEP (CONFIG bit 10).
Independent of port selection (MIISEL=X).
Output. Non volatile output pin. Driven by MII
SELECT (CONFIG bit 15). High indicates the
MII port is selected, low indicates the 10 Mbps
ENDEC is selected.
Output. Non volatile output pin. Driven by AUI
SELECT (CONFIG bit 8). Independent of port
selection (MIISEL= X).
Output to MII PHY. Envelope to 100 Mbps
transmission. This pin stays low if MIISEL is low.
Input from MII PHY. Envelope of packet
reception used for deferral and backoff
purposes. This pin is ignored when MIISEL is
low.
Input from MII PHY. Envelope of data valid
reception. Used for receive data framing. This
pin is ignored when MIISEL is low.
Input from MII PHY. Collision detection input.
This pin is ignored when MIISEL is low.
Outputs. Transmit Data nibble to MII PHY.
Input. Transmit clock input from MII. Nibble rate
clock (25 MHz). This pin is ignored when
MIISEL is low.
Input. Receive clock input from MII PHY. Nibble
rate clock. This pin is ignored when MIISEL is
low.
FEAST Fast Ethernet Controller with Full Duplex Capability
DESCRIPTION
SMSC DS – LAN91C100FD Rev. D