LAN91C100-FD SMSC [SMSC Corporation], LAN91C100-FD Datasheet - Page 59

• Manufacturer Part Number: LAN91C100-FD
• Description: FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
• Manufacturer: SMSC [SMSC Corporation]

7.3
SMSC DS – LAN91C100FD Rev. D
FEAST Fast Ethernet Controller with Full Duplex Capability
IOCHRDY
nIOCS16
ISA BUS
SIGNAL
D0-D15
A1-A15
RESET
On ISA machines, the LAN91C100FD is accessed as a 16 bit peripheral. No support for XT (8 bit
peripheral) is provided. The signal connections are listed in the following table:
nIOWR
nSBHE
nIORD
High End ISA or Non-Burst EISA Machines
IRQn
GND
AEN
VCC
A0
Table 7.2 - High-End ISA or Non-Burst EISA Machines Signal Connectors
nLDEV buffered
LAN91C100FD
nCYCLE W/nR
INTR0-INTR3
LCLK nADS
nBE2 nBE3
nRDYRTN
SIGNAL
A1-A15
RESET
D0-D15
ARDY
nBE0
nBE1
nWR
AEN
nRD
PRELIMINARY
Address bus used for I/O space and register decoding.
Qualifies valid I/O decoding - enabled access when low.
I/O Read strobe - asynchronous read accesses. Address is valid
before leading edge.
I/O Write strobe - asynchronous write access. Address is valid
before leading edge. Data is latched on trailing edge.
This signal is negated on leading nRD, nWR if necessary. It is
then asserted on CLK rising edge after the access condition is
satisfied.
16 bit data bus. The bus byte(s) used to access the device are a
function of nBE0 and nBE1:
nBE0
Not used = tri-state on reads, ignored on writes
nLDEV is a totem pole output. Must be buffered using an open
collector driver. nLDEV is active on valid decodes of A15-A4 and
AEN=0.
No upper word access.
0
0
1
UNUSED PINS
nBE1
Page 59
0
1
0
D0-D7
Lower
Lower
Not used
NOTES
D8-D15
Upper
Not used
Upper
Rev. 10/14/2002