LAN91C100-FD SMSC [SMSC Corporation], LAN91C100-FD Datasheet - Page 22

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LAN91C100-FD

Manufacturer Part Number
LAN91C100-FD
Description
FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
Manufacturer
SMSC [SMSC Corporation]
Datasheet
BANK SELECT REGISTER
Note:
Note:
Rev. 10/14/2002
C
0
2
4
6
8
A
E
BYTE
BYTE
HIGH
LOW
OFFSET
The default bit values upon hard reset are highlighted below each register.
A special BANK (BANK7) exists to support the addition of external registers.
BS2, BS1, BS0 Determine the bank presently in use. This register is always accessible and is used to
select the register bank in use.
The upper byte always reads as 33h and can be used to help determine the I/O location of the
LAN91C100FD.
The BANK SELECT REGISTER is always accessible regardless of the value of BS0-2.
The bank select register can be accessed as a doubleword at offset Ch, as a word at offset Eh, or
as at offset Fh, however a doubleword write to offset Ch will write the BANK SELECT REGISTER
but will not write the registers Ch and Dh.
BANK 7 has no internal registers other than the BANK SELECT REGISTER itself. On valid cycles where
BANK7 is selected (BS0=BS1=BS2=1), and A3=0, nCSOUT is activated to facilitate implementation of
external registers.
BANK7 does not exist in LAN91C9x devices. For backward S/W compatibility BANK7 accesses should be
done if the Revision Control register indicates the device is the LAN91C100FD.
RESERVED (0)
BANK SELECT
E
EPH STATUS
COUNTER
BANK0
MCR
RCR
TCR
MIR
X
0
0
BANK SELECT
X
0
0
REGISTER
NAME
GENERAL PURPOSE
Table 5.1 - Internal I/O Space Mapping
BANK SELECT
CONTROL
PRELIMINARY
CONFIG
BANK1
BASE
X
IA0-1
IA2-3
IA4-5
1
1
Page 22
READ/WRITE
X
1
1
TYPE
MMU COMMAND
BANK SELECT
FIFO PORTS
INTERRUPT
POINTER
X
0
0
BANK2
FEAST Fast Ethernet Controller with Full Duplex Capability
DATA
DATA
PNR
ARR
BS2
0
0
0
SMSC DS – LAN91C100FD Rev. D
SYMBOL
BSR
BANK SELECT
BS1
1
1
0
REVISION
BANK3
MGMT
MT0-1
MT4-5
MT6-7
MT2-3
ERCV
BS0
1
1
0

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