LAN91C100-FD SMSC [SMSC Corporation], LAN91C100-FD Datasheet - Page 3

• Manufacturer Part Number: LAN91C100-FD
• Description: FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
• Manufacturer: SMSC [SMSC Corporation]

Chapter 1
Chapter 2
Chapter 3
Chapter 4
4.1
4.2
Chapter 5
5.1
5.2
5.3
5.4
5.5
5.6
Chapter 6
Chapter 7
7.1
7.2
7.3
7.4
Chapter 8
8.1
8.2
Chapter 9
Chapter 10
Chapter 11
Figure 3.1 - LAN91C100FD Block Diagram .................................................................................................................13
Figure 3.2 - LAN91C100FD System Diagram ..............................................................................................................14
Figure 4.1 - LAN91C100FD Internal Bock diagram with Data Path..............................................................................18
Figure 5.1 - Data Packet Format ..................................................................................................................................19
Figure 5.2 - Interrupt Structure .....................................................................................................................................37
Figure 5.3 - Interrupt Service Routine ..........................................................................................................................45
Figure 5.4 - RX INTR ...................................................................................................................................................46
Figure 5.5 - TX INTR....................................................................................................................................................47
Figure 5.6 - TXEMPTY INTR (Assumes Auto release Option Selected) ......................................................................48
SMSC DS – LAN91C100FD Rev. D
FEAST Fast Ethernet Controller with Full Duplex Capability
4.1.1
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
Description of Block........................................................................................................................... 15
CSMA/CD BLOCK............................................................................................................................. 15
Packet Format in Buffer Memory ...................................................................................................... 19
Typical Flow of Events for Transmit (Auto Release = 0)................................................................... 41
Typical Flow of Events for Transmit (Auto Release = 1)................................................................... 43
Typical Flow of Events for Receive ................................................................................................... 44
Memory Partitioning .......................................................................................................................... 49
Interrupt Generation .......................................................................................................................... 50
Fast Ethernet Slave Adapter ............................................................................................................. 56
VL Local Bus 32 Bit Systems ............................................................................................................ 56
High End ISA or Non-Burst EISA Machines...................................................................................... 59
EISA 32 Bit SLAVEEISA 32 Bit Slave............................................................................................... 61
Maximum Guaranteed Ratings* ........................................................................................................ 64
DC Electrical Characteristics............................................................................................................. 64
Clock Generator Block............................................................................................................................15
DMA Block..............................................................................................................................................15
Arbiter Block ...........................................................................................................................................15
MMU Block .............................................................................................................................................16
BIU Block................................................................................................................................................16
MAC-PHY Interface Block ......................................................................................................................16
MII Management Interface Block ............................................................................................................17
Serial EEPROM Interface .......................................................................................................................17
General Description ............................................................................................................. 5
Pin Configuration................................................................................................................. 6
Description of Pin Functions ............................................................................................... 7
Functional Description....................................................................................................... 15
Data Structures and Registers .......................................................................................... 19
Board Setup Information .................................................................................................. 53
Application Considerations ............................................................................................... 56
Operational Description .................................................................................................... 64
Timing Diagrams................................................................................................................ 67
Package Outlines............................................................................................................. 77
LAN91C100FD REV. D Revisions ................................................................................ 79
TABLE OF CONTENTS
PRELIMINARY
LIST OF FIGURES
Page 3
Rev. 10/14/2002