LAN9218-MT-E2 SMSC [SMSC Corporation], LAN9218-MT-E2 Datasheet - Page 19
![no-image](/images/no-image-200.jpg)
LAN9218-MT-E2
Manufacturer Part Number
LAN9218-MT-E2
Description
High-Performance Single- Chip 10/100 Ethernet Controller with HP Auto-MDIX
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9218-MT-E2.pdf
(130 pages)
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High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
SMSC LAN9218
20,28,
42,48,
55,61,
19,27,
34,41,
47,54,
81,85,
77,80,
60,96
86,88
3,65
1,66
NO.
PIN
35,
10
97
89
11
9
2
7
4
8
Reference Ground
Internal Regulator
Reference Power
+3.3V I/O Power
Analog Ground
+3.3V Analog
Note 2.1
Core Voltage
Core Ground
PLL Ground
I/O Ground
Decoupling
PLL Power
Test Pin
RBIAS
NAME
Power
Power
Please refer to the SMSC application note AN 12.5x, entitled "Designing with the LAN9218
Family - Getting Started". It is also important to note that this application note applies to
the whole SMSC LAN9118 family of Ethernet controllers. However, subtle differences may
apply.
Table 2.5 System and Power Signals (continued)
GND_CORE
VDD_CORE
VDD_REF
VDD_PLL
VSS_REF
VSS_PLL
SYMBOL
GND_IO
VDD_IO
ATEST
RBIAS
VDD_A
VSS_A
VREG
DATASHEET
BUFFER
TYPE
AI
19
P
P
P
P
P
P
P
P
P
P
P
I
PINS
NUM
1
1
1
8
8
3
4
2
2
1
1
1
1
PLL Bias: Connect to an external
12.0K ohm 1.0% resistor to ground.
Used for the PLL Bias circuit.
This pin must be connected to VDD
for normal operation.
3.3V input for internal voltage
regulator
+3.3V I/O logic power supply pins
Ground for I/O pins
+3.3V Analog power supply pins. See
Note 2.1
Ground for analog circuitry
1.8 V from internal core regulator.
Both pins must be connected
together externally and then tied to a
10uF 0.1-Ohm ESR capacitor, in
parallel with a 0.01uF capacitor to
Ground next to each pin. See
Note 2.1
Ground for internal digital logic
1.8V Power from the internal PLL
regulator. This external pin must be
connected to a 10uF 0.1-Ohm ESR
capacitor, in parallel with a 0.01uF
capacitor to Ground. See
GND for the PLL
Connected to 3.3v power and used
as the reference voltage for the
internal PLL
Ground for internal PLL reference
voltage
DESCRIPTION
Revision 1.5 (07-18-06)
Note 2.1
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