LAN9218-MT-E2 SMSC [SMSC Corporation], LAN9218-MT-E2 Datasheet - Page 43
![no-image](/images/no-image-200.jpg)
LAN9218-MT-E2
Manufacturer Part Number
LAN9218-MT-E2
Description
High-Performance Single- Chip 10/100 Ethernet Controller with HP Auto-MDIX
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9218-MT-E2.pdf
(130 pages)
- Current page: 43 of 130
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High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
SMSC LAN9218
3.13.2
Figure 3.12, "TX Buffer Format", shows the TX Buffer as it is written into the LAN9218. It should be
noted that not all of the data shown in this diagram is actually stored in the TX data FIFO. This must
be taken into account when calculating the actual TX data FIFO usage. Please refer to
"Calculating Actual TX Data FIFO Usage," on page 47
actual TX data FIFO usage.
TX Command Format
The TX command instructs the TX FIFO controller on handling the subsequent buffer. The command
precedes the data to be transmitted. The TX command is divided into two, 32-bit words; TX command
‘A’ and TX command ‘B’.
There is a 16-bit packet tag in the TX command ‘B’ command word. Packet tags may, if host software
desires, be unique for each packet (i.e., an incrementing count). The value of the tag will be returned
in the RX status word for the associated packet. The Packet tag can be used by host software to
uniquely identify each status word as it is returned to the host.
Both TX command ‘A’ and TX command ‘B’ are required for each buffer in a given packet. TX
command ‘B’ must be identical for every buffer in a given packet. If the TX command ‘B’ words do not
match, the Ethernet controller will assert the Transmitter Error (TXE) flag.
Host Write
Order
2nd
3rd
Last
1st
Figure 3.12 TX Buffer Format
31
DATASHEET
Offset + Data DWORD0
Optional offset DWORD0
Optional offset DWORDn
Optional Pad DWORDn
Optional Pad DWORD0
TX Command 'B'
TX Command 'A'
Last Data & PAD
43
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for a detailed explanation on calculating the
0
Revision 1.5 (07-18-06)
Section 3.13.5,
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