PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 77

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

REGISTER 4-3:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CCP5MD
R/W-0
CCP5MD: CCP5 Module Disable bit
1 = The CCP5 module is disabled. All CCP5 registers are held in Reset and are not writable.
0 = The CCP5 module is enabled
CCP4MD: CCP4 Module Disable bit
1 = The CCP4 module is disabled. All CCP4 registers are held in Reset and are not writable.
0 = The CCP4 module is enabled
CCP3MD: CCP3 Module Disable bit
1 = The CCP3 module is disabled. All CCP3 registers are held in Reset and are not writable.
0 = The CCP3 module is enabled
CCP2MD: CCP2 Module Disable bit
1 = The CCP2 module is disabled. All CCP2 registers are held in Reset and are not writable.
0 = The CCP2 module is enabled
CCP1MD: ECCP1 Module Disable bit
1 = The ECCP1 module is disabled. All ECCP1 registers are held in Reset and are not writable.
0 = The ECCP1 module is enabled
UART2MD: EUSART2 Module Disable bit
1 = The USART2 module is disabled. All USART2 registers are held in Reset and are not writable.
0 = The USART2 module is enabled
UART1MD: EUSART1 Module Disable bit
1 = The USART1 module is disabled. All USART1 registers are held in Reset and are not writable.
0 = The USART1 module is enabled
SSPMD: MSSP Module Disable bit
1 = The MSSP module is disabled. All SSP registers are held in Reset and are not writable.
0 = The MSSP module is enabled
CCP4MD
R/W-0
PMD0: PERIPHERAL MODULE DISABLE REGISTER 0
W = Writable bit
‘1’ = Bit is set
CCP3MD
R/W-0
CCP2MD
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
CCP1MD
R/W-0
UART2MD
R/W-0
x = Bit is unknown
UART1MD
R/W-0
DS39977C-page 77
SSPMD
R/W-0
bit 0