AT89LP428-20MU ATMEL [ATMEL Corporation], AT89LP428-20MU Datasheet - Page 70

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AT89LP428-20MU

Manufacturer Part Number
AT89LP428-20MU
Description
8-bit Microcontroller with 4K/8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
13.4.2
70
AT89LP428/828
Symmetrical PWM
Figure 13-8. Asymmetrical (Edge-Aligned) PWM
For Symmetrical PWM, Timer 2 should be configured for Auto-reload mode and Count Mode 2
or 3 (CP/RL2 = 0, DCEN = 0, T2CM1-0 = 1xB). Symmetrical PWM uses dual-slope operation as
shown in
MIN. The timer is equal to TOP for exactly one clock cycle. In non-inverting mode, the output
CCx is cleared on the up-count compare match between Timer 2 (TL2, TH2) and the channel
data register (CCxL, CCxH), and set at the down-count compare match. In inverting mode, the
output CCx is set on the up-count compare match between Timer 2 and the data register, and
cleared at the down-count compare match. The resulting symmetrical PWM output waveform is
center-aligned around the timer equal to TOP point. Symmetrical PWM may be used to generate
non-overlapping waveforms.
The TOP value in RCAP2L and RCAP2H is double buffered such that the output frequency is
only updated at the underflow. The channel data register (CCxL, CCxH) is also double-buffered
to prevent glitches. The output frequency and duty cycle for symmetrical PWM are given by the
following equations:
The extreme compare values represent special cases when generating a PWM waveform. If the
compare value is set equal to (or greater than) TOP, the output will remain high or low for non-
inverting and inverting modes, respectively. If the compare value is set to MIN (0000H), the out-
put will remain low or high for non-inverting and inverting modes, respectively.
{RCAP2H,RCA2L}
{CCxH,CCxL}
Figure
Non-inverted
Inverted
Inverting:
13-9. The timer counts up from MIN to TOP and then counts down from TOP to
CCx
Non-Inverting:
Duty Cycle
f
OUT
=
---------------------------------------------------------------- -
2
×
Duty Cycle
Oscillator Frequency
=
{
RCAP2H RCAP2L
100%
CP/RL2 = 0, T2CM
×
=
,
{
-------------------------------------------------------------------------------------------------- -
RCAP2H RCAP2L
100%
{
×
}
RCAP2H RCAP2L
1-0
,
------------------------------------------------------
{
×
RCAP2H RCAP2L
= 01B, DCEN = 0
-------------------- -
TPS
{
CCxH CCxL
1
,
+
}
1
,
,
{
CCxH CCxL
}
}
,
}
}
3654A–MICRO–8/09

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