ADM1027ARQZ-RL71 ONSEMI [ON Semiconductor], ADM1027ARQZ-RL71 Datasheet - Page 46

• Manufacturer Part Number: ADM1027ARQZ-RL71
• Manufacturer: ONSEMI [ON Semiconductor]

ADM1027
Register Address
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
Exceeding any of the TACH limit registers by 1 indicates that the fan is running too slowly or has stalled. The appropriate status bit
will be set in Interrupt Status Register 2 to indicate the fan failure. Setting the Configuration Register 1 lock bit has no effect on
these registers.
Register Address
0x5C
0x5D
0x5E
Bit
<2:0>
(Fan Startup
Timeout)
<3>
<4>
<7:5>
These registers become read-only when the configuration register 1 lock bit is set to 1. Any subsequent attempts to write to these
registers will fail.
Name
SPIN
Reserved Read-Only
INV
BHVR
R/W
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
R/W
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
TACH 1 Minimum Low Byte
TACH 1 Minimum High Byte
TACH 2 Minimum Low Byte
TACH 2 Minimum High Byte
TACH 3 Minimum Low Byte
TACH 3 Minimum High Byte
TACH 4 Minimum Low Byte
TACH 4 Minimum High Byte
Table XV. Fan Tachometer Limit Registers
Description
Description
PWM1 Configuration
PWM2 Configuration
PWM3 Configuration
Description
These bits control the startup timeout for PWMx. The PWM output stays high until two
valid TACH rising edges are seen from the fan. If there is not a valid TACH signal during
the fan TACH measurement directly after the fan startup timeout period, then the TACH
measurement will read 0xFFFF and Status Register 2 will reflect the fan fault. If the
TACH minimum high and low byte contains 0xFFFF or 0x0000, then the Status Register
2 bit will not be set, even if the fan has not started.
000 = No startup timeout
001 = 100 ms
010 = 250 ms (default)
011 = 400 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
Note: Do not program 100.
Reserved for future use.
This bit inverts the PWM output. The default is 0, which corresponds to a logic high
output for 100% duty cycle. Setting this bit to 1, inverts the PWM output, so 100% duty
cycle corresponds to a logic low output.
These bits assign each fan to a particular temperature sensor for localized cooling.
000 = Remote 1 temperature controls PWMx (automatic fan control mode).
001 = Local temperature controls PWMx (automatic fan control mode).
010 = Remote 2 temperature controls PWMx (automatic fan control mode).
011 = PWMx runs full speed (default).
100 = PWMx disabled.
101 = Fastest speed calculated by local and Remote 2 temperature controls PWMx.
110 = Fastest speed calculated by all three temperatures controls PWMx.
111 = Manual mode. PWM duty cycle registers (Reg. 0x30 to 0x32) become writable.
Table XVI. PWM Configuration Registers
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Power-On Default
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
Power-On Default
0x62
0x62
0x62
REV. A