ADM1027ARQZ-RL71 ONSEMI [ON Semiconductor], ADM1027ARQZ-RL71 Datasheet - Page 50

• Manufacturer Part Number: ADM1027ARQZ-RL71
• Manufacturer: ONSEMI [ON Semiconductor]

ADM1027
Register Address
0x64
0x65
0x66
Bit
<7:0>
These registers become read-only when the ADM1027 is in automatic fan control mode.
Register Address
0x67
0x68
0x69
These are the T
run at minimum speed and increase with temperature according to T
These registers become read-only when the Configuration Register 1 lock bit is set. Any further attempts to write to these registers
will have no effect.
Register Address
0x6A
0x6B
0x6C
If any temperature measured exceeds its THERM limit, all PWM outputs will drive their fans at 100% duty cycle. This is a fail-safe
mechanism incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the
event that software or hardware locks up. If set to 0x80, this feature is disabled. The PWM output will remain at 100% until the
temperature drops below THERM limit – 4rC .
These registers become read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to these registers
will have no effect.
Register Address
0x6D
0x6E
Each 4-bit value controls the amount of temperature hysteresis applied to a particular temperature channel. Once the temperature for
that channel falls below its T
Up to 15
to switch on and off regularly when the temperature is close to T
These registers become read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to these registers
will have no effect.
o
Name
PWM Duty
C of hysteresis may be assigned to any temperature channel. Setting the hysteresis value lower than 4
MIN
registers for each temperature channel. When the temperature measured exceeds T
R/W
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
R/W
Read/Write
Read/Write
Read/Write
R/W
Read/Write
Read/Write
Read/Write
R/W
Read/Write
Read/Write
MIN
value, the fan will remain running at PWM
Table XX. PWM Minimum Duty Cycle Registers
Table XXIII. Temperature Hysteresis Registers
Description
PWM1 Minimum Duty Cycle
PWM2 Minimum Duty Cycle
PWM3 Minimum Duty Cycle
Description
These bits define the PWM
0x00 = 0% duty cycle (fan off)
0x40 = 25% duty cycle
0x80 = 50% duty cycle
0xFF = 100% duty cycle (fan full speed)
Description
Remote 1 Temperature T
Local Temperature T
Remote 2 Temperature T
Description
Remote 1 THERM Limit
Local THERM Limit
Remote 2 THERM Limit
Description
Remote 1, Local Temperature Hysteresis
Remote 2 Temperature Hysteresis
Table XXII. Therm Limit Registers
Rev. 3 | Page 50 of 56 | www.onsemi.com
Table XXI. T
–50–
MIN
MIN
MIN
.
RANGE
MIN
MIN
Registers
MIN
.
MIN
duty cycle for the PWMx output.
duty cycle until the temperature = T
Power-On Default
0x80 (50% duty cycle)
0x80 (50% duty cycle)
0x80 (50% duty cycle)
Power-On Default
0x5A (90
0x5A (90
0x5A (90
Power-On Default
0x64 (100
0x64 (100
0x64 (100
Power-On Default
0x44
0x40
o
o
o
C)
C)
C)
o
o
o
C)
C)
C)
MIN
, the appropriate fan will
o
C will cause the fan
MIN
– hysteresis.
REV. A