HD6417729 HITACHI [Hitachi Semiconductor], HD6417729 Datasheet - Page 181

• Manufacturer Part Number: HD6417729
• Description: Hitachi Microcomputer Development Environment System
• Manufacturer: HITACHI [Hitachi Semiconductor]

Examples:
To set the following conditions for channel 1 hardware breakpoint:
To set the following conditions for channel 2 hardware breakpoint:
To set the following conditions for channel 1 hardware breakpoint:
To set the following conditions for channel 2 hardware breakpoint:
To set the following conditions for channel 3 hardware breakpoint:
Related Items:
BCC, BCD, BCE, and TM commands
[Breakpoints] window
[Break] and [Break Condition] dialog boxes
<addropt> item: An address bus value of H'1000000,
<dataopt> item: D0 bit of the byte access data is 0,
<r/wopt> item: write cycle.
> bcs channel 1 address H'1000000 data mask B'*******0 byte
direction write (RET)
<addropt> item: Sets an address bus value of H'1000000 during the
program fetch cycles, and breaks before execution,
<asidopt> item: The ASID value is H’0.
> bcs channel 2 address H'1000000 pc asid H'0 (RET)
<addropt> item: Sets an address bus value of H'1000000 during the program fetch cycles
with a mask set to the lower 10 bits, and breaks after execution,
<asidopt> item: H'10 to the ASID value.
> bcs channel 1 address H'1000000 pcafter m1 asid H'10 (RET)
<accessopt> item: Execution cycles,
<r/wopt> item: Read cycles.
> bcs channel 2 access dat direction read (RET)
<ldtlbopt> item: Breaks during LDTLB instruction execution,
<ioopt> item: Breaks when the internal I/O area is accessed.
> bcs channel 3 ldtlb break io (RET)
Rev. 2.0, 01/01, page 157 of 216