HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 49

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

1.7.10
In bit-synchronous mode, each DMAC channel in the SCA can perform chained-block transfer, in
which one or more data blocks are transferred in a continuous sequence (figure 1.21).
To set up a chained-block transfer:
1.
2.
3.
4.
On the DMA request from the MSCI, the DMAC will automatically fetch the first descriptor and
begin chained-block transfer.
address of a data buffer (data block), the data length, the starting address of the next descriptor,
and other information.
Create one or more descriptors in memory. A descriptor is a string of data giving the starting
Write the starting address of the first descriptor in a DMAC register.
Set necessary values in other DMAC registers.
Enable the corresponding DMA channel.
DMA Buffer Chaining
DMAC registers
address of first
Data
length n
descriptor
* Chain pointer base (CPB) + current descriptor address register (CDA)
Starting
SCA
0
First data buffer
next descriptor
Data length n
First descriptor
*
data buffer
address of
address of
Starting
Starting
Figure 1.21 DMA Buffer Chaining
0
n
1
Second data buffer
Second descriptor
Address space
n
1
n
2
Third data buffer
Third descriptor
n
2
n
Rev. 0, 07/98, page 33 of 453
3
Fourth data buffer
Fourth descriptor
n
3