HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 95
![no-image](/images/no-image-200.jpg)
HD64570
Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD64570.pdf
(469 pages)
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CLK
A to A
AS (ME)
WAIT
RD
WR
D to D
(Out)
D to D
(In)
0
0
0
CLK
A to A
AS (ME)
WAIT
RD
WR
D to D
(Out)
D to D
(In)
Figure 3.16 Master Mode Bus Timing Sequence in CPU Mode 1
23
0
0
0
7
7
23
7
7
T
1
DMA read cycle
T
Memory address
DMA read cycle
1
Memory address
T
2
T
2
T
With T
Data
latch point
No T
W
Data
latch point
T
W
3
W
T
states
3
states
Transmit data
Transmit data
T
DMA write cycle
1
T
Memory address
DMA write cycle
1
Receive data
T
Memory address
2
T
Receive data
2
T
Rev. 0, 07/98, page 79 of 453
3
T
W
T
3
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