HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 88
![no-image](/images/no-image-200.jpg)
HD64570
Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD64570.pdf
(469 pages)
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Note:
Rev. 0, 07/98, page 72 of 453
CLK
BHE
CS
RD
WR
WAIT
D to D
(Out)
D to D
(In)
A to A
0
0
0
1.
2.
15
15
7
Figure 3.9 Slave Mode Bus Timing Sequence in CPU Mode 0
Ti states are required between successive slave mode bus cycles or interrupt
acknowledge cycles.
State numbers do not match MPU state numbers.
Read cycle SCA
T
1
Register address
T
2
T
Output data
3
MPU
T
4
T
i
Write cycle MPU
Data latch point
T
1
Register address
T
Input data
2
T
3
SCA
T
4
T
i
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