CS8415A-IZ CIRRUS [Cirrus Logic], CS8415A-IZ Datasheet - Page 4

• Manufacturer Part Number: CS8415A-IZ
• Description: 96 kHz DIGITAL AUDIO INTERFACE RECEIVER
• Manufacturer: CIRRUS [Cirrus Logic]

LIST OF TABLES
LIST OF FIGURES
4
Table 1. Control Register Map Summary ...................................................................................... 19
Table 2. Equivalent Software Mode Bit Definitions ....................................................................... 30
Table 3. Hardware Mode Start-up Options.................................................................................... 30
Table 4. External PLL Component Values .................................................................................... 42
Figure 1. Audio Port Master Mode Timing....................................................................................... 7
Figure 2. Audio Port Slave Mode and Data Input Timing ................................................................ 7
Figure 3. SPI Mode Timing.............................................................................................................. 8
Figure 4. I2C Mode timing ............................................................................................................... 9
Figure 5. Recommended Connection Diagram for Software Mode............................................... 10
Figure 6. Serial Audio Output Example Formats........................................................................... 13
Figure 7. AES3 Receiver Timing for C & U pin output data .......................................................... 16
Figure 8. Control Port Timing in SPI Mode.................................................................................... 17
Figure 9. Control Port Timing in I2C Mode.................................................................................... 18
Figure 9. Hardware Mode.............................................................................................................. 30
Figure 10. Professional Input Circuit ............................................................................................. 36
Figure 11. Transformerless Professional Input Circuit .................................................................. 36
Figure 12. Consumer Input Circuit ................................................................................................ 37
Figure 13. S/PDIF MUX Input Circuit ............................................................................................ 37
Figure 14. TTL/CMOS Input Circuit............................................................................................... 37
Figure 15. Channel Status Data Buffer Structure.......................................................................... 38
Figure 16. Flowchart for Reading the E Buffer .............................................................................. 38
Figure 17. PLL Block Diagram ...................................................................................................... 40
Figure 18. Recommended Layout Example .................................................................................. 41
Figure 19. Jitter Attenuation Characteristics of PLL with Fs=32 to 96 kHz Filter Components ..... 42
CS8415A