CS8415A-IZ CIRRUS [Cirrus Logic], CS8415A-IZ Datasheet - Page 7

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CS8415A-IZ

Manufacturer Part Number
CS8415A-IZ
Description
96 kHz DIGITAL AUDIO INTERFACE RECEIVER
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS
(Inputs: Logic 0 = 0 V, Logic 1 = VL+; C
Notes: 7. The active edges of OSCLK are programmable.
OSCLK Active Edge to SDOUT Output Valid
Master Mode
RMCK to OSCLK active edge delay
RMCK to OLRCK delay
OSCLK and OLRCK Duty Cycle
Slave Mode
OSCLK Period
OSCLK Input Low Width
OSCLK Input High Width
OSCLK Active Edge to OLRCK Edge
OLRCK Edge Setup Before OSCLK Active Edge
(o u tp u t)
O L R C K
(o u tp u t)
(o u tp u t)
(o u tp u t)
O S C L K
R M C K
R M C K
10. This delay is to prevent the previous OSCLK edge from being interpreted as the first one after OLRCK
11. This setup time ensures that this OSCLK edge is interpreted as the first one after OLRCK has changed.
Figure 1. Audio Port Master Mode Timing
8. The polarity OLRCK is programmable.
9. No more than 128 SCLK per frame.
has changed.
H a rd w a re M o d e
S o ftw a re M o d e
t sm d
Parameter
t
lm d
L
= 20 pF)
(Note 7,8,10)
OSCLK
OLRCK
(input)
SDOUT
(input)
(Note 7)
(Note 8)
(Note 9)
(Note 7)
7,8,11)
(Note
Figure 2. Audio Port Slave Mode and Data Input Timing
t
Symbol
lrckd
t
t
t
t
t
t
t
t
sckw
sckh
lrckd
lrcks
smd
sckl
dpd
lmd
t
lrcks
Min
36
14
14
20
20
0
0
-
-
t
sckh
Typ
50
-
-
-
-
-
-
-
-
t
sckw
Max
t
20
10
10
sckl
-
-
-
-
-
-
CS8415A
t dpd
Units
ns
ns
ns
ns
ns
ns
ns
ns
%
7

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