CS8420 CIRRUS [Cirrus Logic], CS8420 Datasheet - Page 30

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CS8420

Manufacturer Part Number
CS8420
Description
DIGITAL AUDIO SAMPLE RATE CONVERTER
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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11.2
SWCLK
VSET
MUTESAO
MUTEAES
DITH
INT1-INT0
TCBLD
30
SWCLK
7
Miscellaneous Control 1 (1)
VSET
0 - RMCK default function
1 - OMCK is switched to output through RMCK in the absence of input to the Receiver
0 - Transmit a 0 for the V bit, indicating that the data is valid, and is normally linear PCM
1 - Transmit a 1 for the V bit, indicating that the data is invalid or is not linear PCM audio data
0 - Normal output (default)
1 - Mute the serial audio output port
0 - Normal output (default)
1 - Mute the AES3 transmitter output
0 - Triangular PDF dither applied to output data. The level of the dither is
1 - No dither applied to output data.
00 - Active high, high output indicates an interrupt condition has occurred (default)
01 - Active low, low output indicates an interrupt condition has occurred
10 - Open drain, active low. This setting requires an external pull up resistor on the
11 - Reserved
0 - TCBL is an input (default)
1 - TCBL is an output
Controls the output of OMCK on the RMCK pin in the absence of input to the Receiver
Transmitted V bit level
Mute control for the serial audio output port
Mute control for the AES3 transmitter output
Dither Control
Interrupt (INT) output pin control
Transmit Channel Status Block pin (TCBL) direction specifier
6
MUTESAO
audio (default)
automatically adjusted to be appropriate for the output word length selected by the
SORES bits (default)
INT pin.
5
MUTEAES
4
DITH
3
INT1
2
INT0
1
CS8420
DS245PP2
TCBLD
0

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