CS8420 CIRRUS [Cirrus Logic], CS8420 Datasheet - Page 7

• Manufacturer Part Number: CS8420
• Description: DIGITAL AUDIO SAMPLE RATE CONVERTER
• Manufacturer: CIRRUS [Cirrus Logic]

SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS
5V ±5%, Inputs: Logic 0 = 0V, Logic 1 = VD+; C
Notes: 5. The active edges of ISCLK and OSCLK are programmable.
DS245PP2
OSCLK Active Edge to SDOUT Output Valid
SDIN Setup TIme Before ISCLK Active Edge
SDIN Hold Time After ISCLK Active Edge
Master Mode
O/RMCK to I/OSCLK active edge delay
O/RMCK to I/OLRCK delay
I/OSCLK and I/OLRCK Duty Cycle
Slave Mode
I/OSCLK Period
I/OSCLK Input Low Width
I/OSCLK Input High Width
I/OSCLK Active Edge to I/OLRCK Edge
I/OLRCK Edge Setup Before I/OSCLK Active Edge (Note 5,6,8)
(output)
ISCLK
OSCLK
(output)
ILRCK
OLRCK
RMCK
OMCK
(input)
Figure 1. Audio Ports Master Mode Timing
6. The polarity of ILRCK and OLRCK is programmable.
7. This delay is to prevent the previous I/OSCLK edge from being interpreted as the first one after I/OLRCK
8. This setup time ensures that this I/OSCLK edge is interpreted as the first one after I/OLRCK has
has changed.
changed.
t smd
Parameter
t
lmd
L
= 20 pF)
(Note 5,6,7)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 6)
ISCLK
OSCLK
ILRCK
OLRCK
(input)
SDOUT
(input)
SDIN
Figure 2. Audio Ports Slave Mode and Data I/O
Symbol
t
t
t
t
t
lrckd
t
t
t
t
sckw
sckh
lrckd
lrcks
smd
t
t
sckl
dpd
lmd
ds
dh
t
lrcks
Min
20
20
36
14
14
20
20
0
0
-
-
t
ds
Timing
t
Typ
(T
sckh
t
50
dh
-
-
-
-
-
-
-
-
-
-
A
= 25 °C; VA+ = VD+ =
t
sckw
Max
t
20
10
10
sckl
-
-
-
-
-
-
-
-
t dpd
CS8420
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
7