STM8S105C4B3 STMICROELECTRONICS [STMicroelectronics], STM8S105C4B3 Datasheet - Page 124

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STM8S105C4B3

Manufacturer Part Number
STM8S105C4B3
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Revision history
14
124/127
Revision history
Date
05-Jun-2008
23-Jun-2008
12-Aug-2008
17-Sep-2008
05-Feb-2009
27-Feb-2009
12-May-2009
Revision
1
2
3
4
5
6
7
Table 59: Document revision history
Changes
Initial release.
Corrected number of high sink outputs to 9 in I/Os on Features.
Updated part numbers in
features.
Updated part numbers in
features.
USART renamed UART1, LINUART renamed UART2.
Added Table 7: Pin-to-pin comparison of pin 7 to 12 in 32-pin
access line devices.
Removed STM8S102xx and STM8S104xx root part numbers
corresponding to devices without data EEPROM.
Updated STM8S103 pinout in Section 5.2 on page 29.
Added low and medium density Flash memory categories.
Added Note 1 in
Updated
Updated STM8S103 pinout in Section 5.2 on page 29
Updated number of High Sink I/Os in pinout.
TSSOP20 pinout modified (PD4 moved to pin 1 etc.)
Added WFQFN20 package
Updated
Added
Removed STM8S103x products (separate STM8S103
datasheet created)
Updated
Added SDIP32 silhouette and package to
package mechanical data
description
Updated V
DocID14771 Rev 9
Memory and register
Table 12: Option bytes
Option
Electrical
DD
and
range (2.95 V to 5.5 V) on Features.
bytes.
Table 17: Current
characteristics.
Table 2: STM8S105xx access line
Table 2: STM8S105xx access line
data ; updated
map.
.
characteristics.
Features
Pinout and pin
STM8S105xx
and
SDIP32

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