STM8S105C4B3 STMICROELECTRONICS [STMicroelectronics], STM8S105C4B3 Datasheet - Page 94
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STM8S105C4B3
Manufacturer Part Number
STM8S105C4B3
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STM8S105C4B3.pdf
(127 pages)
- Current page: 94 of 127
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Electrical characteristics
94/127
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SCK
c(SCK)
r(SCK)
f(SCK)
su(NSS)
h(NSS)
w(SCKH)
w(SCKL)
su(MI)
su(SI)
h(MI)
h(SI)
a(SO)
dis(SO)
v(SO)
v(MO)
1
(1)
(1)
(1)
(1) (2)
(1)
(1)
(1)
(1)
(1) (3)
(1)
(1)
(1)
Parameter
SPI clock
frequency
SPI clock rise
and fall time
NSS setup time
NSS hold time
SCK high and
low time
Data input
setup time
Data input
setup time
Data input hold
time
Data input hold
time
Data output
access time
Data output
disable time
Data output
valid time
Data output
valid time
Table 43: SPI characteristics
DocID14771 Rev 9
Conditions
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Master mode
Master mode
Slave mode
Master mode
Slave mode
Slave mode
Slave mode
Slave mode
(after enable edge)
Master mode
(after enable edge)
Min
0
0
4 x
t
70
t
15
5
5
7
10
25
MASTER
SCK
/2 -
Max
8
6
25
t
15
3 x
t
73
36
SCK
MASTER
STM8S105xx
/2 +
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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