STM8S105C4B3 STMICROELECTRONICS [STMicroelectronics], STM8S105C4B3 Datasheet - Page 19

• Manufacturer Part Number: STM8S105C4B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM8S105xx
4.14.2
4.14.3
Asynchronous communication (UART mode)
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Synchronous communication
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LIN master mode
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LIN slave mode
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SPI
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I²C
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Full duplex communication - NRZ standard format (mark/space)
Programmable transmit and receive baud rates up to 1 Mbit/s (f
following any standard baud rate regardless of the input frequency
Separate enable bits for transmitter and receiver
Two receiver wakeup modes:
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Transmission error detection with interrupt generation
Parity control
Full duplex synchronous transfers
SPI master operation
8-bit data communication
Maximum speed: 1 Mbit/s at 16 MHz (f
Emission: Generates 13-bit synch break frame
Reception: Detects 11-bit break frame
Autonomous header handling - one single interrupt per valid message header
Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
Synch delimiter checking
11-bit LIN synch break detection - break detection always active
Parity check on the LIN identifier field
LIN error management
Hot plugging support
Maximum speed: 8 Mbit/s (f
Full duplex synchronous transfers
Simplex synchronous transfers on two lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
CRC calculation
1 byte Tx and Rx buffer
Slave/master selection input pin
I²C master features:
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Address bit (MSB)
Idle line (interrupt)
Clock generation
DocID14771 Rev 9
MASTER
/2) both for master and slave
CPU
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CPU
/16) and capable of
Product overview
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