FAN5400_11 FAIRCHILD [Fairchild Semiconductor], FAN5400_11 Datasheet - Page 26

• Manufacturer Part Number: FAN5400_11
• Description: FAN5400 / FAN5401 / FAN5402 / FAN5403 / FAN5404 / FAN5405 USB-Compliant Single-Cell Li-Ion Switching Charger
• Manufacturer: FAIRCHILD [Fairchild Semiconductor]

During the initial system startup, while the charger IC is
being programmed, the system current is limited to 325mA
for 1ms during steps 4 and 5. This is the value of the soft-
start I
If the system is powered up without a battery present, the
CV bit should be set. When a battery is inserted, the CV bit
is cleared.
Charger Status / Fault Status
The STAT pin indicates the operating condition of the IC and
provides a fault indicator for interrupt driven systems.
Table 12. STAT Pin Function
The FAULT bits (R0[2:0]) indicate the type of fault in Charge
Mode (see Table 13).
Table 13. Fault Status Bits During Charge Mode
© 2009 Fairchild Semiconductor Corporation
FAN5400 Family • Rev. 1.0.7
EN_STAT
B2
0
0
0
0
1
1
1
1
Fault Bit
X
X
0
1
CHARGE
B1
0
0
1
1
0
0
1
1
current used when I
B0
0
1
0
1
0
1
0
1
(Charging or Boost)
Normal Conditions
Charge State
Normal (No Fault)
VBUS OVP
Sleep Mode
Poor Input Source
Battery OVP
Thermal Shutdown
Timer Fault
No Battery
Charging
Fault
X
Fault Description
INLIM
is set to No Limit.
128s Pulse,
then OPEN
STAT Pin
OPEN
OPEN
LOW
26
Charge Mode Control Bits
Setting either HZ_MODE or CE through I
charger and puts the IC into High-Impedance Mode and
resets t
t
(except SAFETY) reset, which enables t
versions with the 15-minute timer.
When t
enters High-Impedance Mode. If CE was set by t
overflow, a new charge cycle can only be initiated through
I
Setting the RESET bit clears all registers. If HZ_MODE or
also cleared, but the t
remains in High-Impedance Mode.
Table 14. FAN5403–FAN5405 DISABLE Pin and
Raising the DISABLE pin stops t
does not reset it. If the DISABLE pin is raised during t
charging, the t
Operational Mode Control
OPA_MODE (REG1[0]) and the HZ_MODE (REG1[1]) bits in
conjunction with the FAULT state define the operational
mode of the charger.
Table 15. Operation Mode Control
The IC resets the OPA_MODE bit whenever the boost is
deactivated, whether due to a fault or being disabled by
setting the HZ_MODE bit.
CE bits were set when the RESET bit is set, these bits are
CE Bit Functionality
32S
2
HZ_MODE OPA_MODE FAULT Operation Mode
C or VBUS POR.
Charging
DISABLE
DISABLE
DISABLE
ENABLE
begins running and, when it overflows, all registers
0
0
0
1
15MIN
32S
. If V
overflows, the IC sets the CE bit and the IC
15MIN
BAT
DISABLE Pin
< V
timer is reset.
X
X
0
1
LOWV
32S
X
X
0
1
timer is not started, and the IC
while in High-Impedance Mode,
X
0
1
0
32S
CE
from advancing, but
X
X
0
1
Charge
Charge Configure
High Impedance
Boost
15MIN
www.fairchildsemi.com
2
C disables the
HZ_MODE
charging on
X
X
0
1
15MIN
15MIN