FAN5400_11 FAIRCHILD [Fairchild Semiconductor], FAN5400_11 Datasheet - Page 31

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FAN5400_11

Manufacturer Part Number
FAN5400_11
Description
FAN5400 / FAN5401 / FAN5402 / FAN5403 / FAN5404 / FAN5405 USB-Compliant Single-Cell Li-Ion Switching Charger
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
Read and Write Transactions
The figures below outline the sequences for data read and
write. Bus control is signified by the shading of the packet,
defined as
All
© 2009 Fairchild Semiconductor Corporation
FAN5400 Family • Rev. 1.0.7
addresses
S
Master Drives Bus
Slave Address
7 bits
and
S
data
Slave Address
0
and
7 bits
0
A
are
Slave Drives Bus
Reg Addr
8 bits
0
MSB
Figure 49. Write Transaction
Figure 50. Read Transaction
0
A
first.
Reg Addr
A
0
8 bits
.
31
R
Table 21. Bit Definitions for Figure 49, Figure 50
Symbol
Slave Address
R
S
A
A
P
7 bits
A
0
START, see Figure 46.
ACK. The slave drives SDA to 0 to acknowledge
the preceding packet.
NACK. The slave sends a 1 to NACK the
preceding packet.
Repeated START, see Figure 48
STOP, see Figure 47
8 bits
Data
1
A
0
A
0
8 bits
Data
Definition
P
1
A
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P

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