SE98 NXP [NXP Semiconductors], SE98 Datasheet

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SE98

Manufacturer Part Number
SE98
Description
DDR memory module temp sensor, 3.3 V
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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1. General description
The NXP Semiconductors SE98 measures temperature from 40 C to +125 C
communicating via the I
Module (DIMM) measuring the DRAM temperature in accordance with the new JEDEC
(JC-42.4) Mobile Platform Memory Module Thermal Sensor Component specification.
Placing the Temp Sensor (TS) on DIMM allows accurate monitoring of the DIMM module
temperature to better estimate the DRAM case temperature (T
exceeding the maximum operating temperature of 85 C. The chip set throttles the
memory traffic based on the actual temperatures instead of the calculated worst-case
temperature or the ambient temperature using a temp sensor mounted on the
motherboard. There is up to a 30 % improvement in thin and light notebooks that are
using one or two 1G SO-DIMM modules, although other memory modules such as in
server applications will also see an increase in system performance. Future uses of the
TS will include more dynamic control over thermal throttling, the ability to use the Alarm
Window to create multiple temperature zones for dynamic throttling and to save processor
time by scaling the memory refresh rate.
The TS consists of an Analog-to-Digital Converter (ADC) that monitors and updates its
own temperature readings 8 times per second, converts the reading to a digital data, and
latches them into the data temperature registers. User-programmable registers, such as
Shutdown or Low-power modes and the specification of temperature event and critical
output boundaries, provide flexibility for DIMM temperature-sensing applications.
When the temperature changes beyond the specified boundary limits, the SE98 outputs
an EVENT signal. The user has the option of setting the EVENT output signal polarity as
either an active LOW or active HIGH comparator output for thermostat operation, or as a
temperature event interrupt output for microprocessor-based systems. The EVENT output
can even be configured as a critical temperature output.
The SE98 supports the industry-standard 2-wire I
SMBus TIMEOUT function is supported to prevent system lock-ups. Manufacturer and
Device ID registers provide the ability to confirm the identify of the device. Three address
pins allow up to eight devices to be controlled on a single bus. To maintain
interchangeability with the I
specified with the operating voltage of 3.0 V to 3.6 V.
SE98
DDR memory module temp sensor, 3.3 V
Rev. 04 — 2 February 2009
2
C-bus/SMBus. It is typically mounted on a Dual In-line Memory
2
C-bus/SMBus interface the electrical specifications are
2
C-bus/SMBus serial interface. The
case
) to prevent it from
Product data sheet

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SE98 Summary of contents

Page 1

... Shutdown or Low-power modes and the specification of temperature event and critical output boundaries, provide flexibility for DIMM temperature-sensing applications. When the temperature changes beyond the specified boundary limits, the SE98 outputs an EVENT signal. The user has the option of setting the EVENT output signal polarity as either an active LOW or active HIGH comparator output for thermostat operation temperature event interrupt output for microprocessor-based systems ...

Page 2

... Type number Topside Package mark Name SE98PW SE98 TSSOP8 SE98TK SE98 HVSON8 SE98_4 Product data sheet 2 C-bus/SMBus compatible 400 kHz (typ./max (typ./max.) + +125 (typ./max +125 C Description plastic thin shrink small outline package; 8 leads; ...

Page 3

... MANUFACTURER ID DEVICE ID DEVICE CAPABILITY REGISTER CONFIGURATION REGISTER EVENT OUTPUT COMPARATOR/INT MODE EVENT OUTPUT POLARITY ENABLE/DISABLE EVENT OUTPUT EVENT OUTPUT STATUS SENSOR ENABLE/SHUTDOWN Block diagram of SE98 Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3.3 V BAND GAP TEMPERATURE SENSOR 11-BIT ADC TEMPERATURE ...

Page 4

... SE98TK Transparent top view Fig 3. Pin configuration for HVSON8 2 C-bus serial data input/output (open-drain). 2 C-bus serial clock input/output (open-drain). © NXP B.V. 2009. All rights reserved. SE98 EVENT 6 SCL 5 SDA 002aab804 ...

Page 5

... Hz to 400 kHz, and the SMBus is from 10 kHz to 100 kHz. The host or bus master generates the SCL signal, and the SE98 uses the SCL signal to receive or send data on the SDA line. Data transfer is serial, bidirectional, and is one bit at a time with the Most Signifi ...

Page 6

... SE98B will allow bit 2 or bit changed even if bit 3 is set. If the device enters Shutdown mode (CONFIG[8]) with asserted EVENT output, the output remains asserted during shutdown ...

Page 7

... Critical Temp Bit 15 Bit 14 only mode Above Above Critical Alarm Trip Window the EVENT output is in Comparator mode hys SE98 T hys T hys T T trip(l) hys time Bit 13 Below Alarm Window © ...

Page 8

... EVENT output immediately when new UPPER or LOWER and Event B3 are set at the same time. – Work-around: Wait at least 125 ms before enabling EVENT output. – SE98B will compare alarm window and temperature register immediately after setting. 7.3.2.2 Critical trip ...

Page 9

... Doing something else (make sure that exceeds 125 ms). 3. Enable the EVENT output (B3 = 1). 4. Wait Read Event value. – SE98B will compare alarm window and temperature register immediately after setting. 7.3.3 Event operation modes 7.3.3.1 Comparator mode In comparator mode, the EVENT output behaves like a window-comparator output that asserts when the temperature is outside the window (e ...

Page 10

... The SE98’s conversion rate is at least 125 ms. 7.5 Power-up default condition After power-on, the SE98 is initialized to the following default condition: • ...

Page 11

... The SE98 supports the SMBus time-out feature. If the host holds SCL LOW between 25 ms and 35 ms, the SE98 would reset its internal state machine to the bus idle state to prevent the system bus hang-up. This feature is turned on by default. The SMBus time-out is disabled by writing a logic 1 to bit 7 of register 22h ...

Page 12

... ACK by device Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3 register address © NXP B.V. 2009. All rights reserved. SE98 Figure ACK STOP by device 002aab308 ...

Page 13

... read register address returned least significant byte data © NXP B.V. 2009. All rights reserved. SE98 8 9 (cont.) (cont ACK by device ACK STOP by device by host 002aab412 8 9 (cont.) (cont.) ...

Page 14

... C-bus word read from register with a pre-set pointer 7.10 Hot plugging The SE98 can be used in hot plugging applications. Internal circuitry prevents damaging current backflow through the device when it is powered down, but with the I EVENT or address pins still connected. The open-drain SDA and EVENT pins (SCL and address pins are input only) effectively places the outputs in a high-impedance state during power-up and power-down, which prevents driver confl ...

Page 15

... Register descriptions 8.1 Register overview This section describes all the registers used in the SE98. The registers are used for latching the temperature reading, storing the low and high temperature limits, configuring, the hysteresis threshold and the ADC, as well as reporting status. The device uses the Pointer register to access these registers ...

Page 16

... Basic capability. 1 — has Alarm and Critical Trips interrupt capability. Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3 WRNG HACC © NXP B.V. 2009. All rights reserved. SE98 BCAP ...

Page 17

... However, it can be cleared at any time. Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3 HEN[1: R/W R EOCTL CVO R/W R/W R/W Figure 5 and © NXP B.V. 2009. All rights reserved. SE98 8 SHMD 0 R/W 0 EMD 0 R/W Table 10 ...

Page 18

... JEDEC specification requires only the Alarm Window lock bit to be set. – Workaround: Clear both Critical Trip and Alarm Window lock bits. – Future 1 3.6 V SE98B will require only the Alarm Window lock bit to be set. Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3.3 V … ...

Page 19

... DDR memory module temp sensor, 3.3 V …continued Above Critical Trip bit (bit 15) Temperature slope rising trip(u) T falling trip(u) hys current temperature hysteresis hysteresis set clear set clear clear SE98 Threshold temperature T th(crit th(crit) hys hysteresis time 002aac799 © NXP B.V. 2009. All rights reserved ...

Page 20

... NXP B.V. 2009. All rights reserved. SE98 Hex E7D0h E190h E010h E004h E002h E000h FFFEh FFFCh FFF0h FF40h ...

Page 21

... UBT Upper Boundary Alarm Trip Temperature (LSB = 0.25 C) RFU reserved; always 0 Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3 SIGN UBT[9: R/W R/W R R/W R/W R/W © NXP B.V. 2009. All rights reserved. SE98 R/W R RFU ...

Page 22

... Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3 SIGN LBT[9: R/W R/W R R/W R/W R SIGN CT[9: R/W R/W R R/W R/W R/W © NXP B.V. 2009. All rights reserved. SE98 R/W R RFU R/W R RFU ...

Page 23

... TEMP[10: Manufacturer (continued © NXP B.V. 2009. All rights reserved. SE98 RFU ...

Page 24

... Device Device revision RFU RFU © NXP B.V. 2009. All rights reserved. SE98 SALRT R ...

Page 25

... NXP Semiconductors 9. Application design-in information In a typical application, the SE98 behaves as a slave device and interfaces to the master (or host) via the SCL and SDA lines. The host monitors the EVENT output pin, which is asserted when the temperature reading exceeds the programmed values in the alarm registers. The A0, A1 and A2 pins are directly connected to the shared SPD’ ...

Page 26

... Thermal considerations In general, self-heating is the result of power consumption and not a concern, especially with the SE98, which consumes very low power. In the event the SDA and EVENT pins are heavily loaded with small pull-up resistor values, self-heating affects temperature accuracy by approximately 0.5 C. ...

Page 27

... SCL, SDA 3 3 SCL, SDA SCL, SDA pins Rev. 04 — 2 February 2009 SE98 Min Typ Max Unit 2.0 < 1 +2.0 C 3.0 < 2 +3.0 C 4.0 < 250 100 ...

Page 28

... DDR memory module temp sensor 3.3 V 3.6 V 15.0 (mA) 10.0 5 temperature 002aac161 75 100 125 amb SE98 002aac158 100 125 amb 002aac160 100 125 amb © NXP B.V. 2009. All rights reserved ...

Page 29

... DDR memory module temp sensor, 3 C-bus from DC Min Typ Max 0 - 400 [1] 4 [2] 300 - - 250 - - [3] 250 - - 0 300 - - 300 - - 250 [ HD;STA t SU;STO S 002aab235 © NXP B.V. 2009. All rights reserved. SE98 Unit kHz ...

Page 30

... REFERENCES JEDEC JEITA MO-153 Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3 detail 6.5 0.7 0.94 0.1 0.1 0.1 6.3 0.5 EUROPEAN PROJECTION SE98 SOT530 (1) Z 0.70 8 0.35 0 ISSUE DATE 00-02-24 03-02-18 © NXP B.V. 2009. All rights reserved ...

Page 31

... JEITA MO-229 Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3 scale detail exposed tie bar (4 ) exposed tie bar ( 0.5 0.05 0.1 0.1 0.05 0.3 EUROPEAN PROJECTION SE98 SOT908-1 c ISSUE DATE 05-09-26 05-10-05 © NXP B.V. 2009. All rights reserved ...

Page 32

... Solder bath specifications, including temperature and impurities SE98_4 Product data sheet DDR memory module temp sensor, 3.3 V Rev. 04 — 2 February 2009 SE98 © NXP B.V. 2009. All rights reserved ...

Page 33

... Volume (mm ) < 350 260 260 250 Figure 22. Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3.3 V Figure 22) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © NXP B.V. 2009. All rights reserved. SE98 ...

Page 34

... Machine Model Most Significant Bit Small Outline Dual In-line Memory Module Power-On Reset System Management Bus Serial Presence Detect Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3.3 V peak temperature 001aac844 © NXP B.V. 2009. All rights reserved. SE98 time ...

Page 35

... Change notice Supersedes - SE98_3 2 C-bus temperature sensor” to description”: description”: description of bit 2, CVO, re-written th paragraph and Table +125 C” to “T amb = +125 C” amb - SE98_2 - SE98_1 - - SE98 = amb © NXP B.V. 2009. All rights reserved ...

Page 36

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 04 — 2 February 2009 DDR memory module temp sensor, 3.3 V © NXP B.V. 2009. All rights reserved. SE98 ...

Page 37

... Critical Alarm Trip register (16-bit read/write 8.6 Temperature register (16-bit read-only 8.7 Manufacturer’s ID register (16-bit read-only 8.8 Device ID register . . . . . . . . . . . . . . . . . . . . . . 24 8.9 SMBus register . . . . . . . . . . . . . . . . . . . . . . . . 24 9 Application design-in information . . . . . . . . . 25 9.1 SE98 in memory module application . . . . . . . 25 DDR memory module temp sensor, 3.3 V 9.2 Layout consideration . . . . . . . . . . . . . . . . . . . 26 9.3 Thermal considerations . . . . . . . . . . . . . . . . . 26 10 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 26 11 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 30 13 Soldering of SMD packages ...

Page 38

... NXP Semiconductors SE98_4 Product data sheet DDR memory module temp sensor, 3.3 V Rev. 04 — 2 February 2009 SE98 © NXP B.V. 2009. All rights reserved ...

Page 39

... NXP Semiconductors SE98_4 Product data sheet DDR memory module temp sensor, 3.3 V Rev. 04 — 2 February 2009 SE98 © NXP B.V. 2009. All rights reserved ...

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