ATTINY15 ATMEL [ATMEL Corporation], ATTINY15 Datasheet - Page 17

• Manufacturer Part Number: ATTINY15
• Manufacturer: ATMEL [ATMEL Corporation]

Watchdog Reset
MCU Status Register –
MCUSR
1187D–12/01
Figure 16. Brown-out Reset during Operation
Note:
When the Watchdog times out, it will generate a short reset pulse of 1 CK cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the time-out period
t
Figure 17. Watchdog Reset during Operation
The MCU Status Register provides information on which reset source caused an MCU
reset.
• Bit 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATtiny15L and always read as zero.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set (one) if a Watchdog Reset occurs. The bit is reset (zero) by a Power-on
Reset, or by writing a logical “0” to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set (one) if a Brown-out Reset occurs. The bit is reset (zero) by a Power-on
Reset, or by writing a logical “0” to the flag.
TOUT
Bit
$34
Read/Write
Initial Value
. Refer to page 34 for details on operation of the Watchdog Timer.
1. The hysteresis on V
INTERNAL
TIME-OUT
RESET
RESET
V
R
7
–
0
CC
R
6
–
0
BOT
: V
R
5
–
0
1 CK Cycle
V
BOT+
BOT-
= V
R
4
–
0
BOT
+ 25 mV, V
(1)
WDRF
R/W
3
BOT-
BORF
R/W
V
t
2
TOUT
BOT+
= V
See Bit Description
BOT
EXTRF
R/W
- 25 mV.
1
ATtiny15L
PORF
R/W
0
MCUSR
17